HM5259165B datasheet(14/63 Pages) ELPIDA

14 / 63 page

HM5259165B/HM5259805B/HM5259405B-75/A6

Data Sheet E0118H10

Self-refresh entry [SELF]: When this command is input during the IDLE state, the SDRAM starts self-

refresh operation. After the execution of this command, self-refresh continues while CKE is Low. Since self-

refresh is performed internally and automatically, external refresh operations are unnecessary.

Power down mode entry: When this command is executed during the IDLE state, the SDRAM enters power

down mode. In power down mode, power consumption is suppressed by cutting off the initial input circuit.

Self-refresh exit: When this command is executed during self-refresh mode, the SDRAM can exit from self-

refresh mode. After exiting from self-refresh mode, the SDRAM enters the IDLE state.

Power down exit: When this command is executed at the power down mode, the SDRAM can exit from

power down mode. After exiting from power down mode, the SDRAM enters the IDLE state.

Function Truth Table

The following table shows the operations that are performed when each command is issued in each mode of

the SDRAM.

The following table assumes that CKE is high.

Current state

RAS CAS WE

Address

Command

Operation

Precharge

×××

DESL

Enter IDLE after t

NOP

Enter IDLE after t

BA, CA, A10 READ/READ A

ILLEGAL*

BA, CA, A10 WRIT/WRIT A

ILLEGAL*

BA, RA

ACTV

ILLEGAL*

BA, A10

PRE, PALL

NOP*

REF, SELF

ILLEGAL

MODE

MRS

ILLEGAL

Idle

×××

DESL

NOP

BA, CA, A10 READ/READ A

ILLEGAL*

BA, CA, A10 WRIT/WRIT A

ILLEGAL*

BA, RA

ACTV

Bank and row active

BA, A10

PRE, PALL

NOP

REF, SELF

Refresh

MODE

MRS

Mode register set

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