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HM5259165B Datasheet(PDF) 16 Page - Elpida Memory

Part # HM5259165B
Description  512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword 횞 16-bit 횞 4-bank/16-Mword 횞 8-bit 횞 4-bank /32-Mword 횞 4-bit 횞 4-bank PC/133, PC/100 SDRAM
PDF  63 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

HM5259165B Datasheet(HTML) 16 Page - Elpida Memory

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HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
16
Current state
CS
RAS CAS WE
Address
Command
Operation
Write
H
×
×××
DESL
Continue burst to end
LH
H
H
×
NOP
Continue burst to end
L
H
L
H
BA, CA, A10 READ/READ A
Term burst and New read
L
H
L
L
BA, CA, A10 WRIT/WRIT A
Term burst and New write
L
L
H
H
BA, RA
ACTV
Other bank active
ILLEGAL on same bank*
3
L
L
H
L
BA, A10
PRE, PALL
Term burst write and
Precharge*
2
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Write with auto-
precharge
H
×
×××
DESL
Continue burst to end and
precharge
LH
H
H
×
NOP
Continue burst to end and
precharge
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL*
4
L
H
L
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL*
4
L
L
H
H
BA, RA
ACTV
Other bank active
ILLEGAL on same bank*
3
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
4
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Refresh (auto-
refresh)
H
×
×××
DESL
Enter IDLE after t
RC
LH
H
H
×
NOP
Enter IDLE after t
RC
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL*
5
L
H
L
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL*
5
L
L
H
H
BA, RA
ACTV
ILLEGAL*
5
L
L
H
L
BA, A10
PRE, PALL
ILLEGAL*
5
LL
LH
×
REF, SELF
ILLEGAL
L
L
L
L
MODE
MRS
ILLEGAL
Notes: 1. H: V
IH.
L: V
IL.
×: V
IH or VIL.
The other combinations are inhibit.
2. An interval of t
DPL is required between the final valid data input and the precharge command.
3. If t
RRD is not satisfied, this operation is illegal.
4. Illegal for same bank, except for another bank.
5. Illegal for all banks.
6. NOP for same bank, except for another bank.



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