HM5259165B datasheet(30/63 Pages) ELPIDA

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HM5259165B/HM5259805B/HM5259405B-75/A6

Data Sheet E0118H10

Write command to Read command interval:

1. Same bank, same ROW address: When the read command is executed at the same ROW address of the

same bank as the preceding write command, the read command can be performed after an interval of no less

than 1 clock. However, in the case of a burst write, data will continue to be written until one clock before the

read command is executed.

WRITE to READ Command Interval (1)

CLK

Command

Din

WRIT

READ

in A0

out B1

out B2

out B3

out B0

Dout

Column = A

Write

Column = B

Read

Column = B

Dout

CAS Latency

DQM,

DQMU/DQML

Burst Write Mode

CAS Latency = 2

Burst Length = 4

Bank 0

WRITE to READ Command Interval (2)

CLK

Command

Din

WRIT

READ

in A0

out B1

out B2

out B3

out B0

Dout

Column = A

Write

Column = B

Read

Column = B

Dout

CAS Latency

in A1

DQM,

DQMU/DQML

Burst Write Mode

CAS Latency = 2

Burst Length = 4

Bank 0

2. Same bank, different ROW address: When the ROW address changes, consecutive read commands

cannot be executed; it is necessary to separate the two commands with a precharge command and a bank-

active command.

3. Different bank: When the bank changes, the read command can be performed after an interval of no less

than 1 clock, provided that the other bank is in the bank-active state. However, in the case of a burst write,

data will continue to be written until one clock before the read command is executed (as in the case of the

same bank and the same address).

HM5259165B Datasheet(PDF) 30 Page - Elpida Memory

HM5259165B Datasheet(HTML) 30 Page - Elpida Memory

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