Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

HM5259165B Datasheet(PDF) 52 Page - Elpida Memory

Part # HM5259165B
Description  512M LVTTL interface SDRAM 133 MHz/100 MHz 8-Mword16-bit4-bank/16-Mword8-bit4-bank /32-Mword4-bit4-bank PC/133, PC/100 SDRAM
PDF  63 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

HM5259165B Datasheet(HTML) 52 Page - Elpida Memory

Back Button HM5259165B Datasheet HTML 48Page - Elpida Memory HM5259165B Datasheet HTML 49Page - Elpida Memory HM5259165B Datasheet HTML 50Page - Elpida Memory HM5259165B Datasheet HTML 51Page - Elpida Memory HM5259165B Datasheet HTML 52Page - Elpida Memory HM5259165B Datasheet HTML 53Page - Elpida Memory HM5259165B Datasheet HTML 54Page - Elpida Memory HM5259165B Datasheet HTML 55Page - Elpida Memory HM5259165B Datasheet HTML 56Page - Elpida Memory Next Button
Zoom Inzoom in Zoom Outzoom out
 52 / 63 page
background image
HM5259165B/HM5259805B/HM5259405B-75/A6
Data Sheet E0118H10
52
Relationship Between Frequency and Minimum Latency
HM5259165B/
HM5259805B/
HM5259405B
Parameter
-75
-A6
Frequency (MHz)
133
100
t
CK (ns)
Symbol
PC/100
Symbol
7.5
10
Notes
Active command to column command
(same bank)
l
RCD
321
Active command to active command
(same bank)
l
RC
97= [l
RAS+ lRP]
1
Active command to precharge command
(same bank)
l
RAS
651
Precharge command to active command
(same bank)
l
RP
321
Write recovery or data-in to precharge
command (same bank)
l
DPL
Tdpl
2
2
1
Active command to active command
(different bank)
l
RRD
221
Self refresh exit time
l
SREX
Tsrx
1
1
2
Last data in to active command
(Auto precharge, same bank)
l
APW
Tdal
5
4
= [l
DPL + lRP]
Self refresh exit to command input
l
SEC
97= [l
RC]
3
Precharge command to high impedance
(
CAS latency = 2)
l
HZP
Troh
2
2
(
CAS latency = 3)
l
HZP
Troh
3
3
Last data out to active command
(Auto precharge, same bank)
l
APR
11
Last data out to precharge (early precharge)
(
CAS latency = 2)
l
EP
–1
–1
(
CAS latency = 3)
l
EP
–2
–2
Column command to column command
l
CCD
Tccd
1
1
Write command to data in latency
l
WCD
Tdwd
0
0
DQM to data in
l
DID
Tdqm
0
0
DQM to data out
l
DOD
Tdqz
2
2
CKE to CLK disable
l
CLE
Tcke
1
1
Register set to active command
l
RSA
Tmrd
1
1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com