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PM0059 Datasheet(PDF) 25 Page - STMicroelectronics |
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PM0059 Datasheet(HTML) 25 Page - STMicroelectronics |
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25 / 29 page ![]() DocID15687 Rev 5 25/29 PM0059 Flash memory interface 28 Bits 31:28 Reserved, must be kept cleared. Bits 27:16 nWRP: Not write protect These bits contain the value of the write-protection option bytes after reset. They can be written to program a new write protect value into Flash memory. 0: Write protection active 1: Write protection not active Bits 15:8 RDP: Read protect These bits contain the value of the read-protection option level after reset. They can be written to program a new read protection value into Flash memory. 0xAA: Level 0, read protection not active 0xCC: Level 2, chip read protection active Others: Level 1, read protection of memories active Bits 7:5 USER: User option bytes These bits contain the value of the user option byte after reset. They can be written to program a new user option byte value into Flash memory. Bit 7: nRST_STDBY Bit 6: nRST_STOP Bit 5: WDG_SW Note: When changing the WDG mode from hardware to software or from software to hardware, a system reset is required to make the change effective. Bit 4 Reserved, must be kept cleared. Bits 3:2 BOR_LEV: BOR reset Level These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level. By default, BOR is off. When the supply voltage (VDD) drops below the selected BOR level, a device reset is generated. 00: BOR Level 3 (VBOR3), reset threshold level 3 01: BOR Level 2 (VBOR2), reset threshold level 2 10: BOR Level 1 (VBOR1), reset threshold level 1 11: BOR off (VBOR0), POR/PDR reset threshold level is applied. Note: For full details about BOR characteristics, refer to the “Electrical characteristics” section in the device datasheet. Bit 1 OPTSTRT: Option start This bit triggers a user option operation when set. It is set only by software and cleared when the BSY bit is cleared. Bit 0 OPTLOCK: Option lock Write to 1 only. When this bit is set, it indicates that the FLASH_OPTCR register is locked. This bit is cleared by hardware after detecting the unlock sequence. In the event of an unsuccessful unlock operation, this bit remains set until the next reset. |
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