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LM26LVCISD-080/NOPB Datasheet(PDF) 22 Page - Texas Instruments |
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LM26LVCISD-080/NOPB Datasheet(HTML) 22 Page - Texas Instruments |
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22 / 33 page ![]() LM26LV TRIP TEST 2 GND 3 OVERTEMP 5 OVERTEMP VDD 4 1 NC 6 RESET Momentary 100k LM26LV TRIP TEST 2 GND 5 OVERTEMP 3 OVERTEMP VDD 4 1 100k NC 6 R1 4.1V R3 R2 0.1 PF U3 LM4040 R4 VOUT V+ VT VTEMP + - U1 LM26LV VDD U2 (High = overtemp alarm) VT1 VT2 VTEMP VOUT VT1 = R1 + R2||R3 (4.1)R2 VT2 = R2 + R1||R3 (4.1)R2 LM26LV SNIS144F – JULY 2007 – REVISED FEBRUARY 2013 www.ti.com Figure 26. Celsius Temperature Switch Figure 27. TRIP TEST Digital Output Test Circuit Figure 28. Latch Circuit using OVERTEMP Output The TRIP TEST pin, normally used to check the operation of the OVERTEMP and OVERTEMP pins, may be used to latch the outputs whenever the temperature exceeds the programmed limit and causes the digital outputs to assert. As shown in Figure 28, when OVERTEMP goes high the TRIP TEST input is also pulled high and causes OVERTEMP output to latch high and the OVERTEMP output to latch low. The latch can be released by either momentarily pulling the TRIP TEST pin low (GND), or by toggling the power supply to the device. The resistor limits the current out of the OVERTEMP output pin. 22 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LM26LV |
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