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TMS320DM814x Datasheet(PDF) 28 Page - Texas Instruments |
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TMS320DM814x Datasheet(HTML) 28 Page - Texas Instruments |
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28 / 376 page  TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com Table 2-5. MMU Bypassed C674x DSP Memory Map (continued) START ADDRESS END ADDRESS SIZE DESCRIPTION (HEX) (HEX) 0x4781_0000 0x4781_1FFF 8KB MMC/SD2 Peripheral Configuration Registers 0x4781_2000 0x47FF_FFFF Reserved 0x4800_0000 0x483F_FFFF 4MB L4 Slow0 Peripheral Domain (see ) 0x4840_0000 0x48FF_FFFF 12MB L4 Slow1 Peripheral Domain (see ) 0x4900_0000 0x490F_FFFF 1MB EDMA Channel Controller Registers 0x4910_0000 0x497F_FFFF Reserved 0x4980_0000 0x498F_FFFF 1MB EDMA Transfer Controller 0 Registers 0x4990_0000 0x499F_FFFF 1MB EDMA Transfer Controller 1 Registers 0x49A0_0000 0x49AF_FFFF 1MB EDMA Transfer Controller 2 Registers 0x49B0_0000 0x49BF_FFFF 1MB EDMA Transfer Controller 3 Registers 0x49C0_0000 0x49FF_FFFF Reserved 0x4A00_0000 0x4AFF_FFFF 16MB L4 Fast Peripheral Domain (see Table 2-6) 0x4B00_0000 0x4BFF_FFFF 16MB Emulation Subsystem 0x4C00_0000 0x4CFF_FFFF 16MB DDR Configuration Registers 0x4D00_0000 0x4FFF_FFFF Reserved 0x5000_0000 0x50FF_FFFF 16MB General Purpose Memory Controller Configuration Registers 0x5100_0000 0x51FF_FFFF 16MB PCI Express (PCIe) Peripheral Configuration Registers 0x5200_0000 0x523F_FFFF Reserved 0x5240_0000 0x527F_FFFF 4MB BitBLT 2D Graphics Engine Configuration Registers 0x5280_0000 0x54BF_FFFF Reserved 0x54C0_0000 0x54FF_FFFF 4MB Analog-to-Digital Converter / Touchscreen Controller DMA Port Registers 0x5500_0000 0x55FF_FFFF 16MB Media Controller Registers(2) 0x5600_0000 0x56FF_FFFF 16MB SGX530 3D Graphics Engine Configuration Registers 0x5700_0000 0x7FFF_FFFF Reserved 0x8000_0000 0xFFFF_FFFF 2GB DDR Addressable Memory Space (2) This range maps into the 0x5500 0000 - 0x55FF FFFF region of ) 28 Device Overview Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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