TMS320DM814X datasheet(9/376 Pages) TI1

9 / 376 page

TMS320DM8148, TMS320DM8147

www.ti.com

SPRS647E – MARCH 2011 – REVISED DECEMBER 2013

SEE

ADDITIONS/MODIFICATIONS/DELETIONS

Section 4.3, Pin Multiplexing Control:

•

Updated/Changed bit 18 from "RSV" to "RXACTIVE"

Table 4-11, PINCNTL1 – PINCNTL270 (PINCNTLx) Registers Bit Descriptions:

•

Updated/Changed the MUXMODE[7:0] Description from "Values other than those ..." to "A value

of zero results ..."

•

Updated/Changed bit 18 description to now support RXACTIVE

Section 4

Device Configurations

Table 4-13, PINCNTLx Registers MUXMODE Functions:

•

Updated/Changed PINCNTL173 row under 0x20 from "UART2_TXD(M1)" to "UART2_TXD(M0)"

•

Updated/Changed PINCNTL231 under 0x80 from "GP3[30](M0)" to "GP3[30](M1)"

Section 4.4, Handling Unused Pins:

•

Added "Unless otherwise noted" to the beginning of, "All supply pins must always ..."

Section 6.1, Absolute Maximum Ratings:

•

Deleted the "V I/O...(Transient Overshoot/Undershoot)" rows of Input and Output voltage ranges

Section 6

•

Added Latch-Up Performance row and Latch-Up footnotes

Device Operating

•

Updated/Changed ESD-HBM footnote to "Level listed is passing level per ANSI/ESDA/JEDEC J5-

Conditions

001..."

•

Updated/Changed ESD-CDM footnote to "Level listed is passing level per EIA-JEDEC JESD22-

C101E..."

Section 6.3, Power on Hours (POH):

•

Added Power-On Hour (POH) section [New]

Section 7.2.2.1

Table 7-5, Supported OPP Combinations:

Dynamic Voltage

Frequency Scaling

•

Deleted lower-end OPP combinations supported for ARM, DSP, and HDVICP2

(DVFS)

Table 7-6 , Power-Up Sequence Ramping Values:

•

Added NO. 1 MIN value of "0" ms.

•

Updated/Changed NO. 1 description to "1.8 V and DVDD_DDR[x] supplies stable..."

Section 7.2.8.1

•

Added NO. 13, "CVDD variable supply ramp...."

Power-Up Sequence

•

Updated/Changed Figure 7-1 according to table changes

•

Deleted 3.3 V Supplies Rising Before 1.8 V Supplies Delta Figure (was Figure 7.2) and associated

footnote references

•

Deleted footnote, "The 3.3 V supplies must be..."

Section 7.2.8.2, Power-Down Sequence:

•

Added, "Ramping down all supplies at the same time...For proper device..." paragraph

Table 7-7, Power-Down Sequence Ramping Values:

•

Updated/Changed "The 1.5-/1.8-V DVDD_DDR[x]..." footnote

•

Updated/Changed figure reference to Figure 7-3

Section 7.2.8.2

•

Added NO. 14, "CVDD_x variable supplies ramp-down..."

Power-Down Sequence

•

Added associated footnote, "CVDD_x must never exceed CVDD by more than 150mV"

Figure 7-2, Power-Down Sequence:

•

Updated/Changed figure according to table changes

Figure 7-3,1.8 V Supplies Falling Before 3.3 V Supplies Delta:

•

Added figure [New]

Contents

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