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TMS320DM814x Datasheet(PDF) 358 Page - Texas Instruments |
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TMS320DM814x Datasheet(HTML) 358 Page - Texas Instruments |
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358 / 376 page  TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com 8.20 Timers The device has eight 32-bit general-purpose (GP) timers (TIMER8 - TIMER1) that have the following features: • TIMER8, TIMER1 are for software use and do not have an external connection • Dedicated input trigger for capture mode and dedicated output trigger/pulse width modulation (PWM) signal • Interrupts generated on overflow, compare, and capture • Free-running 32-bit upward counter • Supported modes: – Compare and capture modes – Auto-reload mode – Start-stop mode • TIMER[8:1] functional clock is sourced from either the DEVOSC, AUXOSC, AUD_CLK2/1/0, TCLKIN, or SYSCLK18 27 MHz as selected by the timer clock multiplexers. • On-the-fly read/write register (while counting) • Generates interrupts to the ARM, DSP, and Media Controller. The device has one system watchdog timer that have the following features: • Free-running 32-bit upward counter • On-the-fly read/write register (while counting) • Reset upon occurrence of a timer overflow condition • The system watchdog timer has two possible clock sources: – RCOSC32K oscillator – RTCDIVIDER • The watchdog timer is used to provide a recovery mechanism for the device in the event of a fault condition, such as a non-exiting code loop. For more detailed information on the GP and Watchdog Timers, see the Timers and Watchdog Timer chapters of the TMS320DM814x DaVinci Digital Media Processors Technical Reference Manual (Literature Number: SPRUGZ8). 8.20.1 Timer Peripheral Register Descriptions 358 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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