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MCP19116-E/MJ Datasheet(PDF) 117 Page - Microchip Technology |
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MCP19116-E/MJ Datasheet(HTML) 117 Page - Microchip Technology |
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117 / 246 page ![]() 2015-2016 Microchip Technology Inc. DS20005479B-page 117 MCP19116/7 17.0 WATCHDOG TIMER (WDT) The Watchdog Timer is a free running timer. The WDT is enabled by setting the WDTE bit in the CONFIG register (default setting). During normal operation, a WDT time out generates a device reset. If the device is in Sleep mode, a WDT time out causes the device to wake up and continue with normal operation. The WDT can be permanently disabled by clearing the WDTE bit in the CONFIG register. Refer to Section 12.1 “Configuration Word” for more information. 17.1 Watchdog Timer (WDT) Operation During normal operation, a WDT time out generates a device reset. If the device is in Sleep mode, a WDT time out causes the device to wake-up and continue with normal operation; this is known as a WDT wake-up. The WDT can be permanently disabled by clearing the WDTE configuration bit. The postscaler assignment is fully under software control and can be changed during program execution. 17.2 WDT Period The WDT has a nominal time-out period of 18 ms (with no prescaler). The time-out periods vary with temperature, VDD and process variations from part to part (refer to Table 5-3). If longer time-out periods are desired, a prescaler with a division ratio of up to 1:128 can be assigned to the WDT under software control by writing to the OPTION_REG register. Thus, time-out periods up to 2.3 seconds can be realized. The CLRWDT and SLEEP instructions clear the WDT and the prescaler, if assigned to the WDT, and prevent it from timing out and generating a device reset. The TO bit in the STATUS register will be cleared upon a Watchdog Timer time out. 17.3 WDT Programming Considerations Under worst-case conditions (i.e., VDD = Minimum, Temperature = Maximum, Maximum WDT prescaler), it may take several seconds before a WDT time out occurs. FIGURE 17-1: WATCHDOG TIMER WITH SHARED PRESCALE BLOCK DIAGRAM T0CKI T0SE pin TMR0 Watchdog Timer WDT Time-Out PS<2:0> Data Bus Set Flag bit T0IF on Overflow T0CS Note 1: T0SE, T0CS, PSA, PS<2:0> are bits in the OPTION_REG register. 2: WDTE bit is in the CONFIG register. 0 1 0 1 0 1 8 8 8-Bit Prescaler 0 1 FOSC/4 PSA PSA PSA WDTE Sync 2 TCY |
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