A3G4250D datasheet(13/44 Pages) STMICROELECTRONICS

Part #	A3G4250D

Description	16-bit rate value data output

PDF	44 Pages

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Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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13 / 44 page

A3G4250D

Mechanical and electrical characteristics

Doc 022768 Rev 3

13/44

2.4.2

I2C - inter IC control interface

Subject to general operating conditions for Vdd and Top.

Figure 5.

I2C slave timing diagram(f)

Table 8.

I2C slave timing values

Symbol

Parameter

I2C standard mode(1)

I2C fast mode(1)

Unit

Min.

Max.

Min.

Max.

f(SCL)

SCL clock frequency

100

400

kHz

tw(SCLL)

SCL clock low time

4.7

1.3

µs

tw(SCLH)

SCL clock high time

4.0

0.6

tsu(SDA)

SDA setup time

250

100

th(SDA)

SDA data hold time

3.45

0.9

µs

th(ST)

START condition hold time

0.6

µs

tsu(SR)

Repeated START condition

setup time

4.7

0.6

tsu(SP)

STOP condition setup time

0.6

tw(SP:SR)

Bus free time between STOP

and START condition

4.7

1.3

Data based on standard I2C protocol requirement; not tested in production.

Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both ports.

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