A3G4250D datasheet(39/44 Pages) STMICROELECTRONICS

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A3G4250D

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Interrupt source register. Read only register.

Reading at this address clears the INT1_SRC IA bit (and eventually the interrupt signal on

the INT1 pin) and allows the refreshment of data in the INT1_SRC register if the latched

option is chosen.

7.17

INT1_THS_XH (32h)

7.18

INT1_THS_XL (33h)

7.19

INT1_THS_YH (34h)

Table 51.

INT1_SRC description

Interrupt active. Default value: 0

(0: no interrupt has been generated; 1: one or more interrupts have been generated)

Z high. Default value: 0 (0: no interrupt, 1: Z high event has occurred)

Z low. Default value: 0 (0: no interrupt; 1: Z low event has occurred)

Y high. Default value: 0 (0: no interrupt, 1: Y high event has occurred)

Y low. Default value: 0 (0: no interrupt, 1: Y low event has occurred)

X high. Default value: 0 (0: no interrupt, 1: X high event has occurred)

X low. Default value: 0 (0: no interrupt, 1: X low event has occurred)

Table 52.

INT1_THS_XH register

THSX14

THSX13

THSX12

THSX11

THSX10

THSX9

THSX8

Table 53.

INT1_THS_XH description

THSX14 - THSX9

Interrupt threshold. Default value: 0000 0000

Table 54.

INT1_THS_XL register

THSX7

THSX6

THSX5

THSX4

THSX3

THSX2

THSX1

THSX0

Table 55.

INT1_THS_XL description

THSX7 - THSX0

Interrupt threshold. Default value: 0000 0000

Table 56.

INT1_THS_YH register

THSY14

THSY13

THSY12

THSY11

THSY10

THSY9

THSY8

Table 57.

INT1_THS_YH description

THSY14 - THSY9

Interrupt threshold. Default value: 0000 0000

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