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ST72361AR4-Auto Datasheet(PDF) 155 Page - STMicroelectronics

Part # ST72361AR4-Auto
Description  Clock, reset and supply management
PDF  279 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72361AR4-Auto Datasheet(HTML) 155 Page - STMicroelectronics

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ST72361xx-Auto
Serial peripheral interface (SPI)
Doc ID 12468 Rev 3
155/279
14.8.3
Data I/O register (SPIDR)
Read/ write
Reset value: Undefined
The SPIDR register is used to transmit and receive data on the serial bus. In a master
device, a write to this register will initiate transmission/reception of another byte.
Note:
During the last clock cycle the SPIF bit is set, a copy of the received data byte in the shift
register is moved to a buffer. When the user reads the serial peripheral data I/O register, the
buffer is actually being read.
While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR
register is read.
Warning:
A write to the SPIDR register places data directly into the
shift register for transmission.
A read to the SPIDR register returns the value located in the buffer and not the content of
the shift register (see Figure 70).
7
0
D7
D6
D5
D4
D3
D2
D1
D0
Table 59.
SPI register map and reset values
Address
(Hex.)
Register label
7
6
5
4
3
2
1
0
21
SPIDR
Reset value
MSB
xx
x
x
x
x
x
LSB
x
22
SPICR
Reset value
SPIE
0
SPE
0
SPR2
0
MSTR
0
CPOL
x
CPHA
x
SPR1
x
SPR0
x
23
SPICSR
Reset value
SPIF
0
WCOL
0
OVR
0
MODF
00
SOD
0
SSM
0
SSI
0



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