A8603KESTR-R datasheet(17/42 Pages) ALLEGRO

17 / 42 page

Multiple-Output Regulator for

Automotive LCD Displays

A8603

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

DESCRIPTION OF REGULATORS

AVDD Regulator

The AVDD output is driven by a linear regulator, which takes its

input power from the boost output voltage. The target voltage of

AVDD is programmable through Register 0x00 (7 bits). Its range

is between 5 V (Register = 0x00) and 15 V (Register = 0x7F)

in 127 steps, with step resolution = 78.74 mV. A representative

block diagram is shown in Figure 3.

The AVDD circuit monitors the voltage drop across its linear

regulator. If this voltage drop is less than the headroom required

(approximately 2 V between OUT and AVDD), the monitor cir-

cuit sends a control signal to cause the boost voltage to increase.

This ensures there is always enough headroom for regulation.

Figure 3: Representative Block Diagram of the

AVDD Regulator

VCOM Regulator

The VCOM output is also driven by a linear regulator similar to the

case of AVDD, except that it takes its input power from the regulated

AVDD output voltage. This arrangement gives VCOM exceptional

stability over full operating temperature range. The target volt-

age of VCOM is programmable through Register 0x01-02 (9 bits

total). Its range is between 2.5 V (Register=0x0000) and 7.5 V

(Register=0x01FF) in 511 steps, with step resolution = 9.785 mV.

In order to ensure there is enough headroom, AVDD must be at

least 1.5 V higher than VCOM.

If VCOM is not required, the VCOM pin can be left open, but a

small output capacitor (approximately 0.1 μF) must be present to

prevent oscillation.

VOUT

AVDD

AGND

Target Voltage

PMOS

From boost

output

OCP

RSC

To boost

controller

CAVDD

(external)

250

Discharge

1.8 V

DAC

I2C Register

0x00

1.8 V

2 V

Reference

Voltage

Enable

Fold

Back

Linear Regulator

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