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PIC12CE673-04/P Datasheet(PDF) 84 Page - Microchip Technology |
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PIC12CE673-04/P Datasheet(HTML) 84 Page - Microchip Technology |
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84 / 116 page ![]() PIC12CE67X DS40181B-page 84 Preliminary © 1998 Microchip Technology Inc. 12.2 DC Characteristics: PIC12LCE673-04 (Commercial, Industrial) PIC12LCE674-04 (Commercial, Industrial) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise specified) Operating temperature 0˚C ≤ TA ≤ +70˚C (commercial) –40˚C ≤ TA ≤ +85˚C (industrial) Param No. Characteristic Sym Min Typ† Max Units Conditions D001 Supply Voltage VDD 2.5 - 5.5 V XT, INTRC, EXTRC and LP osc configuration (DC - 4 MHz) D002* RAM Data Retention Voltage (Note 1) VDR - TBD - V Device in SLEEP mode D003 VDD start voltage to ensure internal Power-on Reset signal VPOR - VSS - V See section on Power-on Reset for details D004* VDD rise rate to ensure internal Power-on Reset signal SVDD TBD - - V/ms See section on Power-on Reset for details D010 D010B D010A Supply Current (Note 2) IDD - - TBD TBD TBD TBD TBD TBD mA mA µA XT, EXTRC osc configuration FOSC = 4 MHz, VDD = 3.0V (Note 4) INTRC osc configuration FOSC = 4 MHz, VDD = 3.0V (Note 5) LP osc configuration FOSC = 32 kHz, VDD = 3.0V, WDT disabled D020 D021 D021A Power-down Current (Note 3) IPD - - - TBD TBD TBD µA µA µA VDD = 3.0V, WDT enabled, –40 °C to +85°C VDD = 3.0V, WDT disabled, 0 °C to +70°C VDD = 3.0V, WDT disabled, –40 °C to +85°C * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current consumption. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD MCLR = VDD; WDT enabled/disabled as specified. 3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS. 4: For EXTRC osc configuration, current through Rext is not included. The current through the resistor can be estimated by the formula Ir = VDD/2Rext (mA) with Rext in kOhm. 5: INTRC calibration value is for 4 MHz nominal at 5V, 25 °C. |
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