BLUENRG-2 datasheet(139/190 Pages) STMICROELECTRONICS

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BlueNRG-2

Functional details

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

1/32 kHz minimum period.



Multiple modes: periodic interrupt and single interrupt generation.



Capability to switch between two load values in periodic mode. The timer reloads

alternatively from one load value to the other and the down-counter starts

decrementing every 31.25 μs (on average).

The RTC timer is a 32-bit free-running counter, clocked by the 32 kHz clock signal (from an

embedded 32 kHz RC), that works in two modes: periodic and one-shot.

Table 178: RTC modes

RTTOS bit

Mode

Description

Periodic

The counter generates an interrupt at a constant interval, reloading a load

value after wrapping past zero. There are two load values: RTC_TLR1 for

pattern value 0 and RTC_TLR2 for pattern value 1.

One-shot

The counter generates an interrupt once. When the counter reaches zero,

it halts until the user restarts it by: setting bit RTTEN in the RTC_TCR

The RTC timer load registers define the values from which the counter restarts

alternatively.

In periodic mode, the timer must be stopped by the software before writing to a load

value of the current pattern value that crosses the pattern register to decide after each

interrupt generation, which value to load. The number of pattern bits to be crossed

periodically (from the 128 bits) is specified in RTC_TCR [10:4]. This process offers the

possibility to have better precision of the average tick period.

In one-shot mode, the timer stops when it reaches zero, but the software can also stop it.

Once the counter is halted, the load registers (RTC_TLR1, RTC_TLR2) can be written and

the counter considers the new written value. After a write, RTTEN (RTC_TCR) is set if the

timer is in self-start mode.

Writing to RTC_TLR1 or RTC_TLR2 has no effect when the counter is running

(the registers contents are not changed).

3.15.2.2

Real-time clock watch

The RTC clock watch consists of two counters and two alarm registers that have the

following features:



Two counters:



Counts seconds, minutes, hours, days of the week, days of the month.



Counts years.



Two alarm registers:



To trigger an interrupt at exact date and time.

The clock watch counters are split in two registers:

The RTC_CWDR register that holds:



Seconds on six bits. Valid values are 0 to 59. (60, 61, 62 and 63 are invalid values,

programming the RTC_CWDR with these values leads to unpredictable behavior.)

The seconds are incremented on the CLK1HZ clock rate.

BLUENRG-2 Datasheet(PDF) 139 Page - STMicroelectronics

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