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¡ Semiconductor

MSM81C55-5RS/GS/JS

(2) Method using RESET

Standby Mode

5 V

4.5 V

2.2 V

GND

RESET

Note: In this case, the C/S register is reset, the port is set into the input mode, and the timer stops.

PIN FUNCTION

RESET

A high level input to this pin resets the chip, places all three I/O ports in the input mode, resets all

output latches and stops timer.

Symbol

Function

Three-state, bi-directional address/data bus. Eight-bit address information on this bus is read into

the internal address latch at the negative going edge of the ALE. Eight bits of data can be read from

or written to the chip using this bus depending on the state of the WRITE or READ input.

ALE

the respective latches.

CE

When the CE input is high, both read and write operations to the chip are disabled.

IO/M

A high level input to this pin selects the internal I/O functions, and a low level selects the memory.

RD

the state of the IO/M line.

TIMER OUT

Timer output. When the present count is reached during timer operation, this pin provides

a square-wave or pulse output depending on the programmed control status.

WR

depending on the state of the line IO/M line.

General-purpose I/O pins. Input/output directions can be determined by programming the command/

status (C/S) register.

Three pins are usable either as general-purpose I/O pins or control pins for the PA and PB ports.

When used as control pins, they are assigned to the following functions:

TIMER IN

Input to the counter/timer

3–6V power supply

GND

GND