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SSD1306Z Datasheet(PDF) 16 Page - List of Unclassifed Manufacturers |
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SSD1306Z Datasheet(HTML) 16 Page - List of Unclassifed Manufacturers |
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16 / 65 page ![]() Solomon Systech Apr 2008 P 16/59 Rev 1.1 SSD1306 Figure 8-1 : Data read back procedure - insertion of dummy read N n n+1 n+2 R/W# E Databus Write column address Read 1st data Dummy read Read 2nd data Read 3rd data 8.1.2 MCU Parallel 8080-series Interface The parallel interface consists of 8 bi-directional data pins (D[7:0]), RD#, WR#, D/C# and CS#. A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write. A rising edge of RD# input serves as a data READ latch signal while CS# is kept LOW. A rising edge of WR# input serves as a data/command WRITE latch signal while CS# is kept LOW. Figure 8-2 : Example of Write procedure in 8080 parallel interface mode CS# WR# D[7:0] D/C# RD# high low Figure 8-3 : Example of Read procedure in 8080 parallel interface mode CS# WR# D[7:0] D/C# RD# high low |
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