TDC-GPX2 datasheet(43/77 Pages) AMSCO

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ams Datasheet

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[v1-03] 2017-Dec-18

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TDC-GPX2 − Detailed Description

LVDS Double Data Read Output Interface (DDR)

With double data read mode the readout rate is doubled or

alternatively the LVDS clock frequency can be halved with

constant readout rate. The data and frame bits are clocked on

rising and falling edges of LCLKOUT. Both bits, data and frame,

are delayed by tDV,LVDS to LCLKOUT in order to grant sufficient

hold time for the receiving device. With configuration

parameter LVDS_DATA_VALID_ADJUST the delay can be

adjusted for all LVDS outputs in common.

Figure 46:

LVDS Outputs

Note(s):

1. Bit width of the reference index and the stop result is configured by STOP_DATA_BITWIDTH and REF_INDEX_BITWIDTH

LVDS Output Test Pattern

Setting LVDS_TEST_PATTERN = 1 the interface continuously

outputs the following fixed test patterns. All stop events are

ignored.

Reference index = 111100001100110010101010bin (=15781034dec)

Stop result = 000010101010110011110000bin (=699632dec)

Depending on the configuration of the output format width

(REF_INDEX_BITWIDTH, STOP_DATA_BITWIDTH) only the

corresponding lower bits of the reference index and the stop

result are transmitted.

Double Data Read(DDR)

SDO#N

SDO#P

LCLK#N

LCLK#P

FRAME#N

FRAME#P

MSB

LSB

Stop (14 – 20 Bits)

Index (0 – 24 Bits)

MSB

LSB

4 LCLK periods

i23 i22 i21 i20 i19 i18 i17 i16 i15

i1 i0

s3 s2 s1 s0

st frame

nd frame

i23 i22 i21 i20 i19 i18 i17 i16 i15 i14 i13 i12 i11 i10

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