PCF2127TSLASH2Y datasheet(57/100 Pages) PHILIPS

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PCF2127

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Product data sheet

Rev. 8 — 19 December 2014

57 of 100

NXP Semiconductors

PCF2127

Accurate RTC with integrated quartz crystal for industrial applications

Table 83).

[1]

n = loaded countdown value. Timer stopped when n = 0.

If the MSF or CDTF flag (register Control_2) is cleared before the end of the INT pulse,

then the INT pulse is shortened. This allows the source of a system interrupt to be cleared

immediately when it is serviced, that is, the system does not have to wait for the

completion of the pulse before continuing, see Figure 30 and Figure 31. Instructions for

clearing bit MSF and bit CDTF can be found in Section 8.11.6.

Table 83.

INT operation (bit TI_TP = 1)

Source clock (Hz)

INT period (s)

n = 1[1]

n > 1

4096

1⁄8192

1⁄4096

1⁄128

1⁄64

1⁄60

1⁄64

(1) Indicates normal duration of INT pulse.

The timing shown for clearing bit MSF is also valid for the non-pulsed interrupt mode. That is, when

TI_TP is logic 0, where the INT pulse may be shortened by setting both bits MI and SI logic 0.

Fig 30. Example of shortening the INT pulse by clearing the MSF flag

(1) Indicates normal duration of INT pulse.

The timing shown for clearing CDTF is also valid for the non-pulsed interrupt mode. That is, when

TI_TP is logic 0, where the INT pulse may be shortened by setting CDTIE logic 0.

Fig 31. Example of shortening the INT pulse by clearing the CDTF flag

PCF2127T/2Y Datasheet(PDF) 57 Page - NXP Semiconductors