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JS28F320J3A-150 Datasheet(PDF) 48 Page - Intel Corporation |
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JS28F320J3A-150 Datasheet(HTML) 48 Page - Intel Corporation |
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48 / 72 page ![]() 256-Mbit J3 (x8/x16) 48 Datasheet NOTE: A0 is not used in x16 mode when accessing the Protection Register map (See Table 8 for x16 addressing). For x8 mode A0 is used (See Table 21 for x8 addressing). Figure 17. Protection Register Memory Map 0x88 0x85 64-bit Segment (User-Programmable) 0x84 0x81 0x80 Lock Register 0 64-bit Segment (Factory-Programmed) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 128-Bit Protection Register 0 Word Address A[23:1]: 128 Mbit A[21:1]: 32 Mbit A[22:1]: 64 Mbit A[24:1]: 256 Mbit Table 20. Word-Wide Protection Register Addressing Word Use A8A7 A6A5 A4A3 A2A1 LOCK Both 10 00 00 0 0 0 Factory 10 00 00 0 1 1 Factory 10 00 00 1 0 2 Factory 10 00 00 1 1 3 Factory 10 00 01 0 0 4 User 1 00 00 101 5 User 1 00 00 110 6 User 1 00 00 111 7 User 1 00 01 000 Table 21. Byte-Wide Protection Register Addressing (Sheet 1 of 2) Byte Use A8A7 A6A5 A4A3 A2A1A0 LOCK Both 10 00 00 0 0 0 LOCK Both 10 00 00 0 0 1 0 Factory 10 00 00 0 1 0 1 Factory 10 00 00 0 1 1 2 Factory 10 00 00 1 0 0 3 Factory 10 00 00 1 0 1 4 Factory 10 00 00 1 1 0 5 Factory 10 00 00 1 1 1 |
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