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JS28F320J3A-150 Datasheet(PDF) 60 Page - Intel Corporation |
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JS28F320J3A-150 Datasheet(HTML) 60 Page - Intel Corporation |
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60 / 72 page  256-Mbit J3 (x8/x16) 60 Datasheet 0606_07A Figure 19. Status Register Flowchart Start SR7 = '1' SR2 = '1' SR4 = '1' SR3 = '1' SR1 = '1' Yes Yes Yes No No No No SR6 = '1' Yes No SR5 = '1' No No Error Command Sequence Yes Yes Yes Error Erase Failure Error Program Failure - Set by WSM - Reset by user - See Clear Status Register Command - Set/Reset by WSM SR4 = '1' Yes No End Command Cycle - Issue Status Register Command - Address = any dev ice address - Data = 0x70 Erase Suspend See Suspend/Resume Flowchart Program Suspend See Suspend/Resume Flowchart Error V PEN < VPENLK Error Block Locked Data Cycle - Read Status Register SR[7:0] |
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