MXT1664T3-ABESSQTP datasheet(28/98 Pages) MICROCHIP

28 / 98 page

MXT1664T3 2.0

DS40002054A-page 28

 2018 Microchip Technology Inc.

FIGURE 5-3:

POWER-UP SEQUENCE

5.3

Power-up and Initialization

The device uses a number of different power domains for optimum performance and contains circuitry to interface

internal signals crossing between the different domains. There is also circuitry to ensure that the device interface logic

will be initialized correctly as the device powers on. Note, however, that this does not negate specific instructions

elsewhere in this section about the order that the different supplies should power up. Also, as previously mentioned,

RESET should be held low until after all power rails are stable. In addition, the device will not initialize until all the voltage

rails have powered up and are present.

If one domain loses power, however (for example, due to a fault or an ESD event), the device should be power-cycled

to ensure that the interface logic is once again initialized. It is therefore recommended that customer designs include

the capability for the host to control all the maXTouch power supplies and pull the RESET line low.

5.4

Summary

The power-up and reset requirements for the maXTouch devices are summarized in Table 5-1.

RESET

VddIO

> 90 ms

Vdd

< 10 ms

CHG

No External drive. Pull-up resistor to VddIO on

and

RESET

CHG

RESET

CHG

when VddIO rises,

and

rise with VddIO

TABLE 5-1:

POWER-UP AND RESET REQUIREMENTS

Condition

External RESET

VddIO Delay

(After Vdd)

AVdd Power-Up

Comments

Low at Power-up

0 ms

Before RESET is

released

If AVdd bring-up is delayed, then additional

actions will be required by the host (see

Section 5.1 “Power-on Reset”

Not driven

<10 ms

Before VddIO

MXT1664T3-ABESSQTP Datasheet(PDF) 28 Page - Microchip Technology

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