MXT1664T3-ABESSQTP datasheet(34/98 Pages) MICROCHIP

34 / 98 page

MXT1664T3 2.0

DS40002054A-page 34

 2018 Microchip Technology Inc.

8.0

I2C COMMUNICATIONS

Communication with the device can be carried out over the I2C interface.

The I2C interface is used in conjunction with the CHG line. The CHG line going active signifies that a new data packet

is available. This provides an interrupt-style interface and allows the device to present data packets when internal

changes have occurred. See Section 8.6 “CHG Line” for more information.

See Section 7.0 “Host Communications” for information on selecting I2C mode.

8.1

I2C Addresses

The device supports two I2C device addresses that are selected using the ADDSEL line at start up. The two internal I2C

device addresses are 0x4A and 0x4B. The selection of the address (and the communication mode) is described in

Section 7.3 “I2C Address Selection – ADDSEL Pin”.

The I2C address is shifted left to form the SLA+W or SLA+R address when transmitted over the I2C interface, as shown

in Table 8-1.

8.2

Writing To the Device

A WRITE cycle to the device consists of a START condition followed by the I2C address of the device (SLA+W). The

next two bytes are the address of the location into which the writing starts. The first byte is the Least Significant Byte

(LSByte) of the address, and the second byte is the Most Significant Byte (MSByte). This address is then stored as the

address pointer.

Subsequent bytes in a multi-byte transfer form the actual data. These are written to the location of the address pointer,

location of the address pointer + 1, location of the address pointer + 2, and so on. The address pointer returns to its

starting value when the WRITE cycle STOP condition is detected.

Figure 8-1 shows an example of writing four bytes of data to contiguous addresses starting at 0x1234.

FIGURE 8-1:

EXAMPLE OF A FOUR-BYTE WRITE STARTING AT ADDRESS 0x1234

8.3

I2C Writes in Checksum Mode

In I2C checksum mode an 8-bit CRC is added to all I2C writes. The CRC is sent at the end of the data write as the last

byte before the STOP condition. All the bytes sent are included in the CRC, including the two address bytes. Any

command or data sent to the device is processed even if the CRC fails.

To indicate that a checksum is to be sent in the write, the most significant bit of the MSByte of the address is set to 1.

For example, the I2C command shown in Figure 8-2 writes a value of 150 (0x96) to address 0x1234 with a checksum.

The address is changed to 0x9234 to indicate checksum mode.

FIGURE 8-2:

EXAMPLE OF A WRITE TO ADDRESS 0x1234 WITH A CHECKSUM

TABLE 8-1:

FORMAT OF AN I2C ADDRESS

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Address: 0x4A or 0x4B

Read/write

Write Data

START

SLA+W

0x34

0x12

0x96

0x9B

0xA0

0xA5

STOP

Write Address

(LSB MSB)

Write Data

START

SLA+W

0x34

0x92

0x96

Checksum

Write Address

(LSB, MSB)

STOP

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