FXLS8964AF datasheet(19/98 Pages) NXP

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NXP Semiconductors

FXLS8964AF

3-Axis Low-g Accelerometer

FXLS8964AF

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Objective data sheet

Rev. 2 — 30 October 2020

19 / 98

the steps of a single-byte read, multiple bytes of data can be read from sequential

acknowledge (NAK) is issued by the master followed by a stop condition (SP) signaling

the end of the transfer.

10.1.2.3 Single byte write

To start a write command, the master transmits a start condition (ST) to the

FXLS8964AF, followed by the slave address with the R/W bit set to '0' for a write, and the

FXLS8964AF sends an acknowledgement. Then the master transmits the address of the

transmits the 8-bit data to write to the designated register and the FXLS8964AF sends an

acknowledgement signaling it has received the data. Since this transmission is complete,

the master transmits a stop condition (SP) to end the data transfer. The data sent to the

FXLS8964AF is now stored in the appropriate register.

10.1.2.4 Multiple byte write

FXLS8964AF automatically increments the register address write pointer after a write

command is received. Therefore, after following the steps of a single-byte write, multiple

bytes of data can be written to sequential registers after each acknowledgment (ACK) is

received.

FXLS8964AF Datasheet(PDF) 19 Page - NXP Semiconductors