FXLS8964AF datasheet(51/98 Pages) NXP

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NXP Semiconductors

FXLS8964AF

3-Axis Low-g Accelerometer

FXLS8964AF

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Objective data sheet

Rev. 2 — 30 October 2020

51 / 98

13.12 SENS_CONFIG2 register (address 16h)

Table 48. SENS_CONFIG2 register (address 16h) bit allocation

Bit

Name

WAKE_PM[1:0]

SLEEP_PM[1:0]

LE_BE

—

AINC_

TEMP

F_READ

Reset

Access

R/W

Table 49. SENS_CONFIG2 register (address 16h) bit description

Field

Description

7:6

WAKE_PM[1:0]

WAKE power mode selection

00b: Low Power mode is selected;

SENS_CONFIG3[7:4] bits are interpreted as WAKE_ODR[3:0]

and sets the ODR and decimation factor as per Table 51.

01b: High Performance Mode is selected;

SENS_CONFIG3[7:4] bits are interpreted as

WAKE_ODR[3:0] and set the ODR and decimation factor as per Table 52.

1xb: Flexible Performance Mode is selected;

SENS_CONFIG3[7:4] bits are interpreted as

WAKE_DEC[3:0], which sets the measurement decimation factor. The effective ODR (and

measurement current) is determined by the combination of the decimation factor and the 12-bit

measurement idle time programmed in the

WAKE_IDLE_MSB and WAKE_IDLE_LSB registers. See

Table 53 for the selectable decimation factors.

Note: In motion detection mode with BT_MODE=VDD, use of HPM or FPM mode is not advised. Only

the default LPM mode should be used.

5:4

SLEEP_PM[1:0]

SLEEP power mode selection

00b: Low Power mode is selected;

SENS_CONFIG3[3:0] bits are interpreted as SLEEP_ODR[3:0]

and sets the ODR and decimation factor as per Table 51.

01b: High Performance Mode is selected;

SENS_CONFIG3[3:0] bits are interpreted as

SLEEP_ODR[3:0] and set the ODR and decimation factor as per Table 52.

1xb: Flexible Performance Mode is selected;

SENS_CONFIG3[3:0] bits are interpreted as

SLEEP_DEC[3:0], which sets the measurement decimation factor. The effective ODR (and

measurement current) is determined by the combination of the decimation factor and the 12-bit

measurement idle time programmed in the

SLEEP_IDLE_MSB and SLEEP_IDLE_LSB registers.

See Table 53 for the selectable decimation factors.

Note: In motion detection mode with BT_MODE=VDD, use of HPM or FPM mode is not advised. Only

the default LPM mode should be used.

LE_BE

Little/Big-endian output mode selection

0: Little-endian output mode is selected; the output data LSBs are stored at the lower logical address

and the MSBs (nibbles) are right-justified.

1: Big-endian output mode is selected; the output data MSBs are stored at the lower logical address

and the LSBs (nibbles) are left justified.

Note: The output data format selection applies only to the data read from the OUT_X/Y/Z, VECM and

BUF_X/Y/Z registers. All other multi-byte fields within the device are fixed in little-endian right justified

format.

AINC_TEMP

Temperature output data auto-increment control

0 (default):

TEMP_OUT register content is not included in auto-increment address range.

TEMP_OUT register content is included in auto-increment address range.

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