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STM32H723VG Datasheet(PDF) 16 Page - STMicroelectronics |
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STM32H723VG Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 227 page  Description STM32H723xE/G 16/227 DS13313 Rev 2 Figure 1. STM32H723xE/G block diagram MSv52561V3 TT-FDCAN1 FDCAN2 I2C1/SMBUS I2C2/SMBUS I2C3/SMBUS AXI/AHB12 (275MHz) CH[1:4]N, CH[1:4], ETR, BKIN, BKIN2 as AF SCL, SDA, SMBA as AF MDMA PJ,PK[11:0] SCL, SDA, SMBA as AF SCL, SDA, SMBA as AF MOSI, MISO, SCK, NSS / SDO, SDI, CK, WS, MCK, as AF TX, RX, RXFD_MODE, TXFD_MODE as AF CH[4;1], ETR as AF FIFO LCD-TFT FIFO CHROM-ART (DMA2D) LCD_R[7:0], LCD_G[7:0], LCD_B[7:0], LCD_HSYNC, LCD_VSYNC, LCD_DE, LCD_CLK CEC as AF IN[1:4] as AF MDC, MDIO as AF AXIM AXIM Arm CPU Cortex-M7 550 MHz AHBP AHBS TRACECLK TRACED[3:0] NJTRST, JTDI, JTCK/SWCLK JTDO/SWDIO, JTDO JTAG/SW ETM I-Cache 32KB D-Cache 32KB I-TCM 64KB D-TCM 64KB 16 Streams FIFO SDMMC1 D[7:0], D123DIR, D0DIR, CMD, CKas AF FIFO DMA1 FIFOs 8 Stream DMA2 FIFOs ETHER MAC FIFO SDMMC2 FIFO OTG_HS FIFO SRAM1 16 KB 8 Stream FMC_signals DMA/ DMA/ PHY MII / RMII MDIO as AF DP, DM, STP, NXT,ULPI:CK , D[7:0], DIR, ID, VBUS ADC1 OUT1, OUT2 as AF 16b AXI/AHB34 (275MHz) WWDG AHB2 (275MHz) PA..H[15:0] HSYNC, VSYNC, PIXCLK, D[13:0] PDCK, DE, RDY, D[15:0] UART9 MOSI, MISO, SCK, NSS as AF MOSI, MISO, SCK, NSS as AF 32-bit AHB BUS-MATRIX BDMA DMA Mux2 Up to 20 analog inputs Most are common to ADC1 & 2 HSEM AHB4 VDDA, VSSA NRESET WKUP[1;2;4;6] @VDD RCC Reset & control OSC32_IN OSC32_OUT AWU VCORE BBgen + POWER MNGT OSC_IN OSC_OUT TS, TAMP1, TAMP3, OUT, REFIN VDD VSS VCAP, VDDLDO @VDD @VDD @VSW SUPPLY SUPERVISION Int POR reset @VDD VINM, VINP, VOUT as AF CKOUT, DATIN[7:0], CKIN[7:0] 2 compl. chan.(TIM15_CH1[1:2]N), 2 chan. (TIM_CH15[1:2], BKIN as AF 1 compl. chan.(TIM16_CH1N), 1 chan. (TIM16_CH1, BKIN as AF 1 compl. chan.(TIM17_CH1N), 1 chan. (TIM17_CH1, BKIN as AF D[7:0], D123DIR, D0DIR, CMD, CKas AF Up to 17 analog inputs Some common to ADC1 and 2 SD_[A;B], SCK_[A;B], FS_[A;B], MCLK_[A;B], D[3:1], CK[2:1] as AF SCL, SDA, SMBA as AF COMPx_INP, COMPx_INM, COMPx_OUT as AF OUT as AF D-TCM 64KB AHB/APB 1 MB FLASH 128 KB AXI SRAM FMC AHB/APB DFSDM USART10 SD_[A;B], SCK_[A;B], FS_[A;B], MCLK_[A;B], D[3:1], CK[2:1] as AF SAI1 SPI5 TIM17 TIM16 TIM15 SPI4 MOSI, MISO, SCK, NSS / SDO, SDI, CK, WS, MCK, as AF SPI1/I2S1 USART6 USART1 TIM1/PWM 16b TIM8/PWM 16b ADC3 GPIO PORTA.. H GPIO PORTJ,K SAI4 COMP1&2 LPTIM5 OUT as AF LPTIM4 OUT as AF LPTIM3 I2C4 MOSI, MISO, SCK, NSS / SDO, SDI, CK, WS, MCK, as AF SPI6/I2S6 RX, TX, CK, CTS, RTS as AF LPUART1 LPTIM2 VREF SYSCFG EXTI WKUP CRC DAP RNG DMA Mux1 To APB1-2 peripherals SRAM2 16 KB ADC2 AHB/APB TIM6 16b TIM7 16b SWPMI TIM2 32b TIM3 16b TIM4 16b TIM5 32b TIM12 16b TIM13 16b TIM14 16b USART2 USART3 UART4 UART5 UART7 UART8 SPI2/I2S2 MOSI, MISO, SCK, NSS / SDO, SDI, CK, WS, MCK, as AF SPI3/I2S3 MDIOS RAM I/F USBCR SPDIFRX1 HDMI-CEC DAC LPTIM1 OPAMP2 AHB/APB XTAL 32 kHz RTC Backup registers XTAL OSC 4- 48 MHz CSI RC LSI RC PLL1+PLL2+PLL3 POR/PDR/BOR PVD Voltage regulator 3.3 to 1.2V LSI HSI CSI HSI48 IN1, IN2, ETR, OUT as AF AHB1 (275MHz) 16 KB SRAM 4 KB BKP RAM 32-bit AHB BUS-MATRIX IWDG Temperature sensor Shared AXI I-TCM 192KB OCTOSPI2 signals OCTOSPI1 signals DLYBSD1 DLYBOS1-2 FDCAN3 DCMI PSSI RX, TX, CK, CTS, RTS, DE as AF RX, TX, CTS, RTS, DE as AF CORDIC FMAC TIM23 TIM24 32b 32b I2C5/SMBUS SCL, SDA, SMBA as AF RX, TX, CK, CTS, RTS, DE as AF RX, TX, CK, CTS, RTS, DE as AF RX, TX, CK, CTS, RTS, DE as A RX, TX, CK, CTS, RTS, DE as A RX, TX, CTS, RTS, DE as AF RX, TX, CTS, RTS, DE as AF RX, TX, CTS, RTS, DE as AF RX, TX, CTS, RTS, DE as AF CH[1:4]N, CH[1:4], ETR, BKIN, BKIN2 as AF IN1, IN2, ETR, OUT as AF 16b 16b 16b 16b CH[4;1], ETR as AF CH[4;1], ETR as AF CH[4;1], ETR as AF CH[4;1], ETR as AF CH[4;1], ETR as AF CH[2;1] as AF CH1 as AF CH1 as AF TX, RX, RXFD_MODE, TXFD_MODE as AF TX, RX, RXFD_MODE, TXFD_MODE as AF OPAMP1 VINM, VINP, VOUT as AF HSI48 RC HSI RC VBAT DLYBSD2 |
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