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STM32H723VG Datasheet(PDF) 23 Page - STMicroelectronics |
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STM32H723VG Datasheet(HTML) 23 Page - STMicroelectronics |
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23 / 227 page  DS13313 Rev 2 23/227 STM32H723xE/G Functional overview 52 3.4 Boot modes At startup, the boot memory space is selected by the BOOT pin and BOOT_ADDx option bytes, allowing to program any boot memory address from 0x0000 0000 to 0x3FFF FFFF which includes: • All Flash address space • All RAM address space: ITCM, DTCM RAMs and SRAMs • The System memory bootloader The boot loader is located in non-user System memory. It is used to reprogram the Flash memory through a serial interface (USART, I2C, SPI, FDCAN, USB-DFU). Refer to application note AN2606 “STM32 microcontroller System memory Boot mode” for details. 3.5 CORDIC co-processor (CORDIC) The CORDIC co-processor provides hardware acceleration of certain mathematical functions, notably trigonometric, commonly used in motor control, metering, signal processing and many other applications. It speeds up the calculation of these functions compared to a software implementation, allowing a lower operating frequency, or freeing up processor cycles in order to perform other tasks. The filter mathematical accelerator unit performs arithmetic operations on vectors. It comprises a multiplier/accumulator (MAC) unit, together with address generation logic, which allows it to index vector elements held in local memory. The unit includes support for circular buffers on input and output, which allows digital filters to be implemented. Both finite and infinite impulse response filters can be realized. The unit allows frequent or lengthy filtering operations to be offloaded from the CPU, freeing up the processor for other tasks. In many cases it can accelerate such calculations compared to a software implementation, resulting in a speed-up of time critical tasks. CORDIC features • 24-bit CORDIC rotation engine • Circular and Hyperbolic modes • Rotation and Vectoring modes • Functions: Sine, Cosine, Sinh, Cosh, Atan, Atan2, Atanh, Modulus, Square root, Natural logarithm • Programmable precision up to 20-bit • Fast convergence: 4 bits per clock cycle • Supports 16-bit and 32-bit fixed point input and output formats • Low latency AHB slave interface • Results can be read as soon as ready without polling or interrupt • DMA read and write channels |
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