STM32H723VG datasheet(192/227 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32H723xE/G

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DS13313 Rev 2

SPI interface characteristics

Unless otherwise specified, the parameters given in Table 107 for SPI are derived from tests

performed under the ambient temperature, fPCLKx frequency and VDD supply voltage

conditions summarized in Table 12: General operating conditions, with the following

configuration:

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load CL = 30 pF

•

Measurement points are done at CMOS levels: 0.5VDD

•

IO Compensation cell activated.

•

HSLV activated when VDD ≤ 2.7 V

•

VOS level set to VOS0

Refer to Section 6.3.16: I/O port characteristics for more details on the input/output alternate

function characteristics (NSS, SCK, MOSI, MISO for SPI).

Table 107. SPI characteristics(1)(2)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fSCK

SPI clock frequency

Master mode,

2.7 V < VDD < 3.6 V, SPI1, 2, 3

125

MHz

Master mode,

1.62 V < VDD < 3.6 V, SPI1, 2,

80/66(3)

Master mode,

1.62 V < VDD < 3.6 V, SPI4, 5,

68.5

Slave receiver mode,

1.62 V < VDD < 3.6 V, SPI1, 2,

100

Slave receiver mode,

1.62 V < VDD < 3.6 V, SPI4, 5,

68.5

Slave mode transmitter/full

duplex, 2.7 V < VDD < 3.6 V

Slave mode transmitter/full

duplex, 1.62 V < VDD < 3.6 V

42.5/31(4)

tsu(NSS)

NSS setup time

Slave mode

th(NSS)

NSS hold time

Slave mode

tw(SCKH),

tw(SCKL)

SCK high and low time

Master mode

tSCK/2-1(5) tSCK/2(5) tSCK/2+1(5)

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