MCP37D11T-80ESLASHTE datasheet(20/136 Pages) MICROCHIP

20 / 136 page

MCP37D11-80: 80 MSPS 12-BIT PIPELINED ADC

DS20006381A-page 20

 2020 Microchip Technology Inc.

FIGURE 2-8:

Sync Timing Diagram with RESET Pin Operation.

FIGURE 2-9:

Sync Timing Diagram with SOFT_RESET Bit Setting.

RESET Pin

SYNC Output

CAL Pin (Output)

Data Output

Clock Input

A. Master Device

TPCAL

SYNC Input

CAL Pin (Output)

Data Output

Clock Input

B. Slave Device(s)

TPCAL

(SLAVE Pin = 1)

(SLAVE Pin = 0)

TSYNC_OUT

Valid Data

Invalid Data

POR

(~ 220 clock cycles)

SYNC Output

CAL Pin (Output)

Data Output

Clock Input

Valid Data

A. Master Device (SLAVE Pin = 0)

Toggle to High at the 2nd rising edge of Clock Input after POR

TPCAL

SYNC Input

CAL Pin (Output)

Data Output

Clock Input

B. Slave Device(s)

TPCAL

(SLAVE Pin = 1)

Valid Data

Invalid

SOFT_RESET = 0

SOFT_RESET = 1

Invalid Data

SPI SOFT RESET Control

Invalid Data

Toggle to High at the 2nd rising edge of Clock Input

after SOFT_RESET = 1

TSYNC_OUT

No Output

TPCAL

Data

Valid

Data

Invalid

Data

Valid

Data

MCP37D11T-80E/TE Datasheet(PDF) 20 Page - Microchip Technology

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