MCP37D11T-80ESLASHTE datasheet(38/136 Pages) MICROCHIP

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MCP37D11-80: 80 MSPS 12-BIT PIPELINED ADC

DS20006381A-page 38

 2020 Microchip Technology Inc.

4.5.3

INTERNAL VOLTAGE REFERENCE

AND BANDGAP OUTPUT

4.5.3.1

Internal Voltage Reference Output

Pins (REF1 and REF0 Pins)

The device has two internal voltage references, and

these references are available at pins REF0 and REF1.

REF0 is the internal voltage reference for the ADC

input stage, and REF1 is for all remaining stages.

The decoupling capacitors for each reference pin are

already embedded in the device’s TFBGA-121

package. Figure 4-7 shows the embedded circuit for

the REF1 and REF0 pins. Therefore, no additional

external circuit is required on the customer’s

application PCB.

4.5.3.2

Bandgap Output Voltage Pin (VBG)

The bandgap circuit is a part of the reference circuit and

the output is available at the VBG pin. The package

includes a 2.2 µF decoupling capacitor for the VBG pin

as shown in Figure 4-7.

FIGURE 4-7:

Embedded Decoupling

Circuit in TFBGA-121 Package for Voltage

Reference and VBG pins. No external circuit is

required on an application PCB.

4.6

External Clock Input

For optimum performance, the MCP37D11-80 requires

a low-jitter differential clock input at the CLK+ and

CLK− pins. Figure 4-8 shows the equivalent clock input

circuit.

FIGURE 4-8:

Equivalent Clock Input

Circuit.

The clock input amplitude range is between 300 mVP-P

and 800 mVP-P. When a single-ended clock source is

used, an RF transformer or balun can be used to

convert the clock into a differential signal for the best

ADC performance. Figure 4-9 shows an example clock

input circuit. The Common-mode voltage is internally

generated and a center-tap is not required. The

back-to-back Schottky diodes across the transformer’s

secondary current limit the clock amplitude to

approximately 0.8 VP-P differential. This limiter helps

prevent large voltage swings of the input clock while

preserving the high slew rate that is critical for low jitter.

FIGURE 4-9:

Transformer-Coupled

Differential Clock Input Configuration.

REF1+

REF1-

2.2 µF

22 nF

220 nF

REF0+ REF0-

2.2 µF

22 nF

220nF

2.2 µF

VBG

220 nF

TFBGA-121 Embedded External Circuit

MCP37D11-80 Silicon

CLK+

CLK-

2pF

300



AVDD12

300



12 k



Clock

Buffer

100 fF

~300 fF

AVDD12

~300 fF

MCP37D11-80

CLK+

CLK-

0.1 µF

Clock



Schottky

(HSMS-2812)

WBC1-1TL

Coilcraft

Diodes

Source

MCP37D11T-80E/TE Datasheet(PDF) 38 Page - Microchip Technology

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