PIC16F684-ESLASHP datasheet(34/164 Pages) MICROCHIP

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PIC16F684

DS41202C-page 32

Preliminary

 2004 Microchip Technology Inc.

TRISA – PORTA TRI-STATE REGISTER (ADDRESS: 85h)

WPUA – WEAK PULL-UP REGISTER (ADDRESS: 95h)

U-0

R/W-1

R-1

R/W-1

—

TRISA5

TRISA4

TRISA3

TRISA2

TRISA1

TRISA0

bit 7

bit 0

bit 7-6:

Unimplemented: Read as ‘0’

bit 5-0:

TRISA<5:0>: PORTA Tri-State Control bit

= PORTA pin configured as an input (tri-stated)

= PORTA pin configured as an output

Note 1: TRISA<3> always reads ‘1’.

2: TRISA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

U-0

R/W-1

U-0

R/W-1

—

WPUA5

WPUA4

—

WPUA2

WPUA1

WPUA0

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5-4

WPUA<5:4>: Weak Pull-up Register bit

= Pull-up enabled

= Pull-up disabled

bit 3

Unimplemented: Read as ‘0’

bit 2-0

WPUA<2:0>: Weak Pull-up Register bit

= Pull-up enabled

= Pull-up disabled

Note 1: Global RAPU must be enabled for individual pull-ups to be enabled.

2: The weak pull-up device is automatically disabled if the pin is in Output mode

(TRISA = 0).

3: The RA3 pull-up is enabled when configured as MCLR and disabled as an I/O in

the configuration word.

4: WPUA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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