PIC16F684-ESLASHST datasheet(77/164 Pages) MICROCHIP

77 / 164 page

 2004 Microchip Technology Inc.

Preliminary

DS41202C-page 75

PIC16F684

11.0

ENHANCED

CAPTURE/COMPARE/PWM

(ECCP) MODULE

The

enhanced

Capture/Compare/PWM

(ECCP)

module contains a 16-bit register which can operate as

• 16-bit Capture register

• 16-bit Compare register

• PWM Master/Slave Duty Cycle register

Capture/Compare/PWM

(CCPR1)

comprised of two 8-bit registers: CCPR1L (low byte)

and CCPR1H (high byte).

The CCP1CON register controls the operation of

ECCP. The special event trigger is generated by a

compare match and will clear both TMR1H and TMR1L

registers.

TABLE 11-1:

ECCP MODE – TIMER

RESOURCES REQUIRED

CCP1CON — ENHANCED CCP OPERATION REGISTER (ADDRESS: 15h)

ECCP Mode

Timer Resource

Capture

Timer1

Compare

Timer1

PWM

Timer2

R/W-0

P1M1

P1M0

DC1B1

DC1B0

CCP1M3

CCP1M2

CCP1M1

CCP1M0

bit 7

bit 0

bit 7-6

P1M<1:0>: PWM Output Configuration bits

If CCP1M<3:2> = 00, 01, 10:

= P1A assigned as Capture/Compare input; P1B, P1C, P1D assigned as port pins

If CCP1M<3:2> = 11:

= Single output; P1A modulated; P1B, P1C, P1D assigned as port pins

= Full-bridge output forward; P1D modulated; P1A active; P1B, P1C inactive

= Half-bridge output; P1A, P1B modulated with dead band control; P1C, P1D assigned as

port pins

= Full-bridge output reverse; P1B modulated; P1C active; P1A, P1D inactive

bit 5-4

DC1B<1:0>: PWM Duty Cycle Least Significant bits

Capture mode:

Unused.

Compare mode:

Unused.

PWM mode:

These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.

bit 3-0

CCP1M<3:0>: ECCP Mode Select bits

0000

= Capture/Compare/PWM off (resets ECCP module)

0001

= Unused (reserved)

0010

= Compare mode, toggle output on match (CCP1IF bit is set)

0011

= Unused (reserved)

0100

= Capture mode, every falling edge

0101

= Capture mode, every rising edge

0110

= Capture mode, every 4th rising edge

0111

= Capture mode, every 16th rising edge

1000

= Compare mode, set output on match (CCP1IF bit is set)

1001

= Compare mode, clear output on match (CCP1IF bit is set)

1010

= Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin

is unaffected)

1011

= Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1or TMR2,

and starts an A/D conversion, if the A/D module is enabled)

1100

= PWM mode; P1A, P1C active-high; P1B, P1D active-high

1101

= PWM mode; P1A, P1C active-high; P1B, P1D active-low

1110

= PWM mode; P1A, P1C active-low; P1B, P1D active-high

1111

= PWM mode; P1A, P1C active-low; P1B, P1D active-low

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

PIC16F684-E/ST Datasheet(PDF) 77 Page - Microchip Technology

PIC16F684-E/ST Datasheet(HTML) 77 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL