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PIC16F684-E/ST Datasheet(PDF) 97 Page - Microchip Technology |
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PIC16F684-E/ST Datasheet(HTML) 97 Page - Microchip Technology |
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97 / 164 page ![]() 2004 Microchip Technology Inc. Preliminary DS41202C-page 95 PIC16F684 12.3.1 POWER-ON RESET The on-chip POR circuit holds the chip in Reset until VDD has reached a high enough level for proper operation. To take advantage of the POR, simply connect the MCLR pin through a resistor to VDD. This will eliminate external RC components usually needed to create Power-on Reset. A maximum rise time for VDD is required. See Section 15.0 “Electrical Specifi- cations” for details. If the BOD is enabled, the maxi- mum rise time specification does not apply. The BOD circuitry will keep the device in Reset until VDD reaches VBOD (see Section 12.3.5 “Brown-Out Detect (BOD)”). When the device starts normal operation (exits the Reset condition), device operating parameters (i.e., voltage, frequency, temperature, etc.) must be met to ensure operation. If these conditions are not met, the device must be held in Reset until the operating conditions are met. For additional information, refer to Application Note AN607, “Power-up Trouble Shooting” (DS00607). 12.3.2 MCLR PIC16F684 has a noise filter in the MCLR Reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. The behavior of the ESD protection on the MCLR pin has been altered from early devices of this family. Voltages applied to the pin that exceed its specification can result in both MCLR Resets and excessive current beyond the device specification during the ESD event. For this reason, Microchip recommends that the MCLR pin no longer be tied directly to VDD. The use of an RC network, as shown in Figure 12-2, is suggested. An internal MCLR option is enabled by clearing the MCLRE bit in the Configuration Word register. When cleared, MCLR is internally tied to VDD and an internal weak pull-up is enabled for the MCLR pin. In-Circuit Serial Programming is not affected by selecting the internal MCLR option. FIGURE 12-2: RECOMMENDED MCLR CIRCUIT 12.3.3 POWER-ON RESET (POR) The on-chip POR circuit holds the chip in Reset until VDD has reached a high enough level for proper operation. To take advantage of the POR, simply connect the MCLR pin through a resistor to VDD. This will eliminate external RC components usually needed to create Power-on Reset. A maximum rise time for VDD is required. See Section 15.0 “Electrical Specifi- cations” for details. If the BOD is enabled, the maxi- mum rise time specification does not apply. The BOD circuitry will keep the device in Reset until VDD reaches VBOD (see Section 12.3.5 “Brown-Out Detect (BOD)”). When the device starts normal operation (exits the Reset condition), device operating parameters (i.e., voltage, frequency, temperature, etc.) must be met to ensure operation. If these conditions are not met, the device must be held in Reset until the operating conditions are met. For additional information, refer to Application Note AN607, “Power-up Trouble Shooting” (DS00607). Note: The POR circuit does not produce an internal Reset when VDD declines. To re-enable the POR, VDD must reach Vss for a minimum of 100 µs. Note: The POR circuit does not produce an internal Reset when VDD declines. To re-enable the POR, VDD must reach Vss for a minimum of 100 µs. VDD PIC16F684 MCLR R1 1k Ω (or greater) C1 0.1 µF (optional, not critical) |
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