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PIC16F684-E/ST Datasheet(PDF) 133 Page - Microchip Technology |
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PIC16F684-E/ST Datasheet(HTML) 133 Page - Microchip Technology |
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133 / 164 page  2004 Microchip Technology Inc. Preliminary DS41202C-page 131 PIC16F684 D020 Power-down Base Current(IPD)(4) — 0.99 TBD nA 2.0 WDT, BOD, Comparators, VREF and T1OSC disabled — 1.2 TBD nA 3.0 — 2.9 TBD nA 5.0 D021 — 0.3 TBD µA 2.0 WDT Current —1.8 TBD µA3.0 —8.4 TBD µA5.0 D022 — 58 TBD µA 3.0 BOD Current(2) — 109 TBD µA5.0 D023 — 3.3 TBD µA 2.0 Comparator Current(3) —6.1 TBD µA3.0 —11.5 TBD µA5.0 D024 — 58 TBD µA2.0 CVREF Current(1) —85 TBD µA3.0 — 138 TBD µA5.0 D025 — 4.0 TBD µA 2.0 T1OSC Current(1) —4.6 TBD µA3.0 —6.0 TBD µA5.0 D026 — 1.2 TBD nA 3.0 A/D Current(1) — 0.0022 TBD µA5.0 15.2 DC Characteristics: PIC16F684-I (Industrial) (Continued) DC CHARACTERISTICS Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial Param No. Device Characteristics Min Typ† Max Units Conditions VDD Note Legend: TBD = To Be Determined. † Data in ‘Typ’ column is at 5.0V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to VDD; MCLR = VDD; WDT disabled. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. 3: The peripheral current is the sum of the base IDD or IPD and the additional current consumed when this peripheral is enabled. The peripheral ∆ current can be determined by subtracting the base IDD or IPD current from this limit. Max values should be used when calculating total current consumption. 4: The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD. |
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