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MPC5675KFF0VMS2R Datasheet(PDF) 81 Page - NXP Semiconductors |
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MPC5675KFF0VMS2R Datasheet(HTML) 81 Page - NXP Semiconductors |
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81 / 147 page ![]() Electrical characteristics MPC5675K Microcontroller Data Sheet, Rev. 9 NXP Semiconductors 81 In fact a current sink contributor is represented by the charge sharing effects with the sampling capacitance: CS and CP2 being substantially a switched capacitance, with a frequency equal to the conversion rate of the ADC, it can be seen as a resistive path to ground. For instance, assuming a conversion rate of 1 MHz, with CS equal to 3 pF, a resistance of 330 kΩ is obtained (REQ =1 / (fC × CS), where fC represents the conversion rate at the considered channel). To minimize the error induced by the voltage partitioning between this resistance (sampled voltage on CS) and the sum of RS +RF , the external circuit must be designed to respect Equation 4: Eqn. 4 Equation 4 generates a constraint for external network design, in particular on resistive path. Internal switch resistances (RSW and RAD) can be neglected with respect to external resistances. Figure 9. Input equivalent circuit A second aspect involving the capacitance network shall be considered. Assuming the three capacitances CF, CP1, and CP2 are initially charged at the source voltage VA (please see the equivalent circuit in Figure 9): A charge sharing phenomenon is installed when the sampling phase is started (A/D switch is closed). Figure 10. Transient behavior during sampling phase In particular two different transient periods can be distinguished: VA RS RF + REQ --------------------- • 1 2 ---LSB < RF CF RS RL RSW1 CP2 VDD Sampling Source Filter Current Limiter EXTERNAL CIRCUIT INTERNAL CIRCUIT SCHEME RS Source Impedance RF Filter Resistance CF Filter Capacitance RL Current Limiter Resistance RSW1 Channel Selection Switch Impedance RAD Sampling Switch Impedance CP Pin Capacitance (two contributions, CP1 and CP2) CS Sampling Capacitance CP1 RAD Channel Selection VA CS VA VA1 VA2 t TS VCS Voltage Transient on CS ΔV < 0.5 LSB 1 2 τ1 < (RSW + RAD) CS << TS τ2 = RL (CS + CP1 + CP2) |
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