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SH79F024XU Datasheet(PDF) 61 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU Datasheet(HTML) 61 Page - SINOWEALTH Electronic Ltd |
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61 / 92 page ![]() SH79F SH79F SH79F SH79F082 082 082 082 61 Reception is enabled only if REN is high. The serial port actually starts the receiving of serial data, with the detection of a falling edge on the RxD pin. For this purpose RxD is sampled at the rate of 16 times baud rate. When a falling edge is detected, the divide-by-16 counter is immediately reset. This helps to align the bit boundaries with the rollovers of the divide- by-16 counter. The 16 states of the counter divide each bit time into 16ths. The bit detector samples the value of RxD at the 7th, 8th and 9th counter state of each bit time. The value accepted is the value that was seen in at least 2 of the 3 samples. This is done for noise rejection. If the first bit detected after the falling edge of RxD pin is not 0, which indicates an invalid start bit, and the reception is immediately aborted. The receive circuits are reset and again looks for a falling edge in the RxD line. If a valid start bit is detected, then the rest of the bits are also detected and shifted into the shift register. After shifting in 9 data bits and the stop bit, the SBUF and RB8 are loaded and RI is set if the following conditions are met: 1. RI must be 0 2. Either SM2 = 0, or the received 9th bit = 1 and the received byte accords with Given Address If these conditions are met, then the 9th bit goes to RB8, the 8 data bits go into SBUF and RI is set. Otherwise the received frame may be lost. At the time, the receiver goes back to looking for another falling edge on the RxD pin. And the user should clear RI by software for further reception. Shift CLK RxD Bit Sample D0 D1 D2 D3 D4 D5 D6 D7 D8 Start Stop RI Receive Timing of Mode 2 Receive Timing of Mode 2 Receive Timing of Mode 2 Receive Timing of Mode 2 Mode Mode Mode Mode 3 3 3 3:::: 9-Bit 9-Bit 9-Bit 9-Bit EUART, EUART, EUART, EUART, Variable Variable Variable Variable Baud Baud Baud Baud Rate Rate Rate Rate,,,, Asynchronous Asynchronous Asynchronous Asynchronous Full-Duplex Full-Duplex Full-Duplex Full-Duplex Mode 3 uses transmission protocol of the Mode 2 and baud rate generation of the Mode 1. SERIAL SERIAL SERIAL SERIAL CONTROLLER CONTROLLER CONTROLLER CONTROLLER TX CLOCK TX START TX SHIFT TI RI RX CLOCK LOAD SBUF RX START RX SHIFT TXD Serial Port Interrupt PARIN LOAD CLOCK SOUT CLOCK SIN PAROUT RXD Read SBUF Internal Data Bus Receive Shift Register Internal Data Bus 16 ÷ 16 ÷ 1-TO-0 DETECTOR Write to SBUF BIT DETECTOR D8 SBUF RB8 Transmit Shift Register STOP START SAMPLE 1 0 2 ÷ D8 TB8 SMOD Timer 1 Overflow |
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