SH79F024XU datasheet(62/92 Pages) SINOWEALTH

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SH79F

SH79F082

082

8.2.3

8.2.3 Baud

Baud

Baud R

Rate

ate

ate Generate

Generate

In Mode 0, the baud rate is programmable to either 1/12 or 1/4 of the system frequency. This baud rate is determined by SM2

bit. When set to 0, the serial port runs at 1/12 of the system clock. When set to 1, the serial port runs at 1/4 of the system

clock.

In Mode 1 & Mode 3, the baud rate can be selected from Timer 1 overflow rate.

The Mode 1 & 3 baud rate equations are shown below, where TH1 is the 8-bit reload register for Timer 1, SMOD is the

EUART baud rate doubler (PCON.7), T1CLK is the clock source of Timer 1.

, Baud Rate using Timer 1, Mode 2

TH1

256

SMOD

BaudRate

−

In Mode 2, the baud rate is programmable to either 1/32 or 1/64 of the system clock. This baud rate is determined by the

SMOD bit (PCON.7). When this bit is set to 0, the serial port runs at 1/64 of the clock. When set to 1, the serial port runs at

1/32 of the clock.

)

SYS

(

SMOD

BaudRate

8.2.4

8.2.4 M

Multi

ulti

ulti----P

Processor

rocessor

rocessor C

Communication

ommunication

Software

Software Address

Address

Address Recognition

Recognition

Modes 2 and 3 of the EUART have a special provision for multi-processor communication. In these modes, 9 data bits are

received. The 9th bit goes into RB8. Then a stop bit follows. The EUART can be programmed such that when the stop bit is

received, the EUART interrupt will be activated (i.e. the request flag RI is set) only if RB8 = 1. This feature is enabled by

setting the bit SM2 in SCON.

A way to use this feature in multiprocessor communications is as follows. lf the master processor wants to transmit a block of

data to one of the several slaves, it first sends out an address byte which identifies the target slave. An address byte differs

from a data byte in that the 9th bit is 1 in an address byte and 0 in a data byte.

With SM2 = 1, no other slave will be interrupted by a data byte. An address byte, however, will interrupt all slaves, so that

each slave can examine the received byte and see if it is being addressed. The addressed slave will clear its SM2 bit and

prepare to receive the data bytes that will be coming. After having received a complete message, the slave sets SM2 again.

The slaves that were not addressed leave their SM2 set and go on with their business, ignoring the incoming data bytes.

Note:

Note: In mode 0, SM2 is used to select baud rate doubling. In mode 1, SM2 can be used to check the validity of the stop bit.

If SM2 = 1 in mode 1, the receive interrupt will not be activated unless a valid stop bit is received.

Automatic

Automatic (Hardware)

(Hardware)

(Hardware) A

Address

ddress

ddress R

Recognition

ecognition

In Mode 2 & 3, setting the SM2 bit will configure EUART act as following: when a stop bit is received, EUART will generate

an interrupt only if the 9th bit that goes into RB8 is logic 1 (address byte) and the received data byte matches the EUART

slave address. Following the received address interrupt, the slave should clear its SM2 bit to enable interrupts on the

reception of the following data byte(s).

The 9-bit mode requires that the 9th information bit is a 1 to indicate that the received information is an address and not data.

When the master processor wants to transmit a block of data to one of the slaves, it first sends out the address of the

targeted slave (or slaves). All the slave processors should have their SM2 bit set high when waiting for an address byte,

which ensures that they will be interrupted only by the reception of an address byte. The Automatic address recognition

feature further ensures that only the addressed slave will be interrupted. The address comparison is done by hardware not

software.

After being interrupted, the addressed slave clears the SM2 bit to receive data bytes. The un-addressed slaves will be

unaffected, as they will be still waiting for their address. Once the entire message is received, the addressed slave should set

its SM2 bit to ignore all transmissions until it receives the next address byte.

The Automatic Address Recognition feature allows a master to selectively communicate with one or more slaves by invoking

the Given Address. All of the slaves may be contacted by using the Broadcast address. Two special Function Registers are

used to define the slave’s address, SADDR, and the address mask, SADEN. The slave address is an 8-bit value specified in

the SADDR register. The SADEN register is actually a mask for the byte value in SADDR. If a bit position in SADEN is 0,

then the corresponding bit position in SADDR is don’t care. Only those bit positions in SADDR whose corresponding bits in

SADEN are 1 are used to obtain the Given Address. This gives the user flexibility to address multiple slaves without changing

the slave address in SADDR. Use of the Given Address allows multiple slaves to be recognized while excluding others.

Slave

Slave 1

Slave

Slave 2

SADDR

10100100

10100111

SADEN (0 mask)

11111010

11111001

Given Address

10100x0x

10100xx1

Broadcast Address (OR)

1111111x

11111111

SH79F024XU Datasheet(PDF) 62 Page - SINOWEALTH Electronic Ltd

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