SH79F024XU datasheet(14/92 Pages) SINOWEALTH

14 / 92 page

SH79F

SH79F082

082

7.1.2

7.1.2 Enhanced

Enhanced

Enhanced C

CPU

PU C

Core

ore

ore SFRs

SFRs

�

Extended 'MUL' and 'DIV' instructions: 16bit*8bit, 16bit/8bit

�

Dual Data Pointer

�

Enhanced CPU core registers: AUXC, DPL1, DPH1, INSCON

The SH79F082 has modified 'MUL' and 'DIV' instructions. These instructions support 16 bit operand. A new register - the

The AUXC register is used during 16 bit operand multiply and divide operations. For other instructions it can be treated as

another scratch pad register.

After reset, the CPU is in standard mode, which means that the 'MUL' and 'DIV' instructions are operating like the standard

8051 instructions. To enable the 16 bit mode operation, the corresponding enable bit in the INSCON register must be set.

Dual

Dual Data

Data

Data Pointer

Pointer

Using two data pointers can accelerate data memory moves. The standard data pointer is called DPTR and the new data

pointer is called DPTR1.

DPTR1 is the same with DPTR, which consists of a high byte (DPH1) and a low byte (DPL1). Its intended function is to hold

a 16-bit address, but it may be manipulated as a 16-bit register or as two independent 8-bit registers.

The DPS bit in INSTCON register is used to choose the active pointer. The user can switch data pointers by toggling the

DPS bit. And all DPTR-related instructions will use the currently selected data pointer.

Table

Table 7

7....2

2 Data Pointer Select Register

Note

Note:::: BKS[1:0] should set as 00,because it only has one bank.

Operation

Result

AUXC

MUL

INSCON.2 = 0; 8 bit mode

(A)*(B)

Low Byte

High Byte

---

INSCON.2 = 1; 16 bit mode

(AUXC A)*(B)

Low Byte

Middle Byte

High Byte

DIV

INSCON.3 = 0; 8 bit mode

(A)/(B)

Quotient Low Byte

Remainder

---

INSCON.3 = 1; 16 bit mode

(AUXC A)/(B)

Quotient Low Byte

Remainder

Quotient High Byte

86H

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

INSCON

BKS1

BKS0

DIV

MUL

DPS

R/W

Reset

Reset Value

Value

((((POR/WDT/LVR

POR/WDT/LVR

POR/WDT/LVR/PIN

/PIN

/PIN))))

Bit

Bit Number

Number

Bit

Bit Mnemonic

Mnemonic

Description

7-6

BKS[1:0]

SFR

SFR B

Bank

ank

ank S

Selection

election

election Bit

Bit

00: SFR Bank selected

others: Reserved

DIV

16 bit/8

bit/8

bit/8 bit

bit

bit Divide

Divide

Divide Selection

Selection

Selection Bit

Bit

0: 8 bit Divide

1: 16 bit Divide

MUL

16 bit/8

bit/8

bit/8 bit

bit

bit Multiply

Multiply

Multiply Selection

Selection

Selection Bit

Bit

0: 8 bit Multiply

1: 16 bit Multiply

DPS

Data

Data Pointer

Pointer

Pointer Selection

Selection

Selection Bit

Bit

0: Data pointer

1: Data pointer1

SH79F024XU Datasheet(PDF) 14 Page - SINOWEALTH Electronic Ltd

SH79F024XU Datasheet(HTML) 14 Page - SINOWEALTH Electronic Ltd

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL