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SH79F024XU Datasheet(PDF) 75 Page - SINOWEALTH Electronic Ltd |
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SH79F024XU Datasheet(HTML) 75 Page - SINOWEALTH Electronic Ltd |
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75 / 92 page  SH79F SH79F SH79F SH79F082 082 082 082 75 8.7.2 8.7.2 8.7.2 8.7.2 Register Register Register Register Table Table Table Table 8 8 8 8....26 26 26 26 Reset Control Register B1H B1H B1H B1H Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 Bit5 Bit5 Bit5 Bit5 Bit4 Bit4 Bit4 Bit4 Bit3 Bit3 Bit3 Bit3 Bit2 Bit2 Bit2 Bit2 Bit1 Bit1 Bit1 Bit1 Bit0 Bit0 Bit0 Bit0 RSTSTAT RSTSTAT RSTSTAT RSTSTAT WDOF - PORF LVRF CLRF WDT.2 WDT.1 WDT.0 R/W R/W R/W R/W R/W - R/W R/W R/W R/W R/W R/W Reset Reset Reset Reset Value Value Value Value ((((POR POR POR POR)))) 0 - 1 0 0 0 0 0 Reset Reset Reset Reset Value Value Value Value ((((WDT WDT WDT WDT)))) 1 - u u u 0 0 0 Reset Reset Reset Reset Value Value Value Value ((((LVR LVR LVR LVR)))) u - u 1 u 0 0 0 Reset Reset Reset Reset Value Value Value Value ((((PIN PIN PIN PIN)))) u - u u 1 0 0 0 Bit Bit Bit Bit Number Number Number Number Bit Bit Bit Bit Mnemonic Mnemonic Mnemonic Mnemonic Description Description Description Description 7 7 7 7 WDOF WDOF WDOF WDOF W W W Watch atch atch atch D D D Dog og og og T T T Timer imer imer imer Overflow Overflow Overflow Overflow or or or or OVL OVL OVL OVL Reset Reset Reset Reset Flag Flag Flag Flag Set by hardware when WDT overflow or OVL reset happened, cleared by software or Power On Reset 0: Watch Dog not overflows and no OVL reset generated 1: Watch Dog overflow or OVL reset occurred 5 5 5 5 PORF PORF PORF PORF Power Power Power Power On On On On Reset Reset Reset Reset Flag Flag Flag Flag Set only by Power On Reset, cleared only by software 0: No Power On Reset. 1: Power On Reset occurred. 4 4 4 4 LVRF LVRF LVRF LVRF L L L Low ow ow ow V V V Voltage oltage oltage oltage Reset Reset Reset Reset Flag Flag Flag Flag Set only by Low Voltage Reset, cleared by software or Power On Reset 0: No Low Voltage Reset occurs 1: Low Voltage Reset occurred 3 3 3 3 CLRF CLRF CLRF CLRF Pin Pin Pin Pin Reset Reset Reset Reset Flag Flag Flag Flag Set only by pin reset, cleared by software or Power On Reset 0: No Pin Reset occurs 1: Pin Reset occurred 2-0 2-0 2-0 2-0 WDT[2:0] WDT[2:0] WDT[2:0] WDT[2:0] WDT WDT WDT WDT Overflow Overflow Overflow Overflow period period period period control control control control bit bit bit bit 000: Overflow period minimal value= 4096ms 001: Overflow period minimal value= 1024ms 010: Overflow period minimal value = 256ms 011: Overflow period minimal value = 128ms 100: Overflow period minimal value = 64ms 101: Overflow period minimal value = 16ms 110: Overflow period minimal value = 4ms 111: Overflow period minimal value = 1ms Notes: Notes: Notes: Notes: If WDT_opt is enable in application, you must clear WatchDog periodically, and the interval must be less than the value list above. |
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