UPSD3422_V01 datasheet(189/300 Pages) STMICROELECTRONICS

189 / 300 page

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UPSD3422, UPSD3433, UPSD3434, UPSD3454

Programmable counter array (PCA) with PWM

189/300

27.13

TCM interrupts

There are 8 TCM interrupts: 6 match or capture interrupts and two counter overflow

interrupts. The 8 interrupts are “ORed” as one PCA interrupt to the CPU.

By the nature of PCA application, it is unlikely that many of the interrupts occur

simultaneously. If they do, the CPU has to read the interrupt flags and determine which one

to serve. The software has to clear the interrupt flag in the status register after serving the

interrupt.

5INTF4

TCM4 Interrupt flag

Set by hardware when a match or capture event occurs.

Must be clear with software.

4INTF3

TCM3 Interrupt flag

Set by hardware when a match or capture event occurs.

Must be clear with software.

3OVF0

PCA0 Counter OverFlow flag

Set by hardware when the counter rolls over. OVF0 flags an interrupt if Bit

EOVFI in PCACON0 is set. OVF1 may be set with either hardware or

software but can only be cleared with software.

2INTF2

TCM2 Interrupt flag

Set by hardware when a match or capture event occurs.

Must be clear with software.

1INTF1

TCM1 Interrupt flag

Set by hardware when a match or capture event occurs.

Must be clear with software.

0INTF0

TCM0 Interrupt flag

Set by hardware when a match or capture event occurs.

Must be clear with software.

Table 153.

PCASTA register bit definition (continued)

Bit

Symbol

Function

Table 154.

TCMMODE0 - TCMMODE5 (6 registers, reset value 00h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

EINTF

E_COMP

CAP_PE

CAP_NE

MATCH

TOGGLE

PWM[1:0]

Table 155.

TCMMODE0 - TCMMODE5 register bit definition

Bit

Symbol

Function

7EINTF

1 - Enable the interrupt flags (INTF) in the status register to generate an

interrupt.

E_COMP

1 - Enable the comparator when set

CAP_PE

1 - Enable Capture Mode, a positive edge on the CEXn pin.

CAP_NE

1 - Enable Capture Mode, a negative edge on the CEXn pin.

MATCH

1 - A match from the comparator sets the INTF bits in the status register.

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UPSD3422 Datasheet(PDF) 189 Page - STMicroelectronics

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