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UPSD3422 Datasheet(PDF) 190 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 190 Page - STMicroelectronics |
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190 / 300 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) Programmable counter array (PCA) with PWM UPSD3422, UPSD3433, UPSD3434, UPSD3454 190/300 2 TOGGLE 1 - A match on the comparator results in a toggling output on CEXn pin. 1-0 PWM[1:0] 01 Enable PWM Mode (x8), fixed frequency. Enable the CEXn pin as a PWM output. 10 Enable PWM Mode (x8) with programmable frequency. Enable the CEXn pin as a PWM output. 11 Enable PWM Mode (x10 or x16), fixed frequency. Enable the CEXn pin as a PWM output. Table 156. TCMMODE register configurations EINTF E_COMP CAP_PE CAP_NE MATCH TOGGLE PWM1 PWM0 TCM FUNCTION 00 0 0 0 0 0 0 No operation (reset value) 01 0 0 0 0 0 1 8-bit PWM, fixed frequency 01 0 0 0 0 1 0 8-bit PWM, programmable frequency 01 0 0 0 0 1 1 10-bit or 16-bit PMW, fixed frequency(1) 1. 10-bit PWM mode requires the 10B_PWM Bit in the PCACON register set to '1.' X 1 0 0 1 1 0 0 16-bit toggle X1 0 0 1 0 0 0 16-bit Software Timer XX 0 1 0 0 0 0 16-bit capture, negative trigger XX 1 0 0 0 0 0 16-bit capture, positive trigger XX 1 1 0 0 0 0 16-bit capture, transition trigger Table 155. TCMMODE0 - TCMMODE5 register bit definition (continued) Bit Symbol Function Obsolete Product(s) - Obsolete Product(s) |
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