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UPSD3422 Datasheet(PDF) 206 Page - STMicroelectronics

Part # UPSD3422
Description  Turbo Plus series Fast Turbo 8032 MCU with USB and programmable logic
PDF  300 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 Datasheet(HTML) 206 Page - STMicroelectronics

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PSD module
UPSD3422, UPSD3433, UPSD3434, UPSD3454
206/300
Drive Select
08h
09h
16h
17h
Write to configure port pins as
either CMOS push-pull or
Open Drain on some pins,
while selecting high slew rate
on other pins. Read to check
status. Default output type is
CMOS push-pull.
Table 192
on
page 241
Input
Macrocells
0Ah
0Bh
18h
Read to obtain logic state of
IMCs. No WRITEs.
Table 173
on
page 230
Enable Out
OCh
0Dh
1Ah
1Bh
Read state of output enable
logic on each I/O port driver. 1
= driver output is enabled, 0 =
driver is off, and it is in high
impedance state. No WRITEs.
Table 196
on
page 242
Output
Macrocells
AB
(MCELLAB)
20h
Read logic state of MCELLAB
outputs (bank of eight OMCs).
Write to load MCELLAB flip-
flops.
Table 169
on
page 228
Output
Macrocells
BC
(MCELLBC)
21h
Read logic state of MCELLBC
outputs (bank of eight OMCs).
Write to load MCELLBC flip-
flops.
Table 170
on
page 228
Mask
Macrocells
AB
22h
Write to set mask for
MCELLAB. Logic '1' blocks
READs/WRITEs of OMC. Logic
'0' will pass OMC value. Read
to check status.
Table 171
on
page 229
Mask
Macrocells
BC
23h
Write to set mask for
MCELLBC. Logic '1' blocks
READs/WRITEs of OMC. Logic
'0' will pass OMC value. Read
to check status.
Table 172
on
page 229
Main Flash
Sector
Protection
C0h
Read to determine Main Flash
Sector Protection Setting (non-
volatile) that was specified in
PSDsoft Express. No WRITEs.
Table 165
on
page 219
Security Bit
and
Secondary
Flash
Sector
Protection
C2h
Read to determine if PSD
module device Security Bit is
active (non-volatile) Logic 1 =
device secured. Also read to
determine Secondary Flash
Protection Setting (non-
volatile) that was specified in
PSDsoft. No WRITEs.
Table 166
on
page 219
Table 162.
CSIOP registers and their offsets (in hexadecimal) (continued)
Register
name
Port A
(80-pin)
Port B Port C Port D Other
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