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UPSD3422 Datasheet(PDF) 204 Page - STMicroelectronics |
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UPSD3422 Datasheet(HTML) 204 Page - STMicroelectronics |
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204 / 300 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) PSD module UPSD3422, UPSD3433, UPSD3434, UPSD3454 204/300 Figure 69. VM register control of memories Figure 70. VM register example corresponding to memory map example 28.3 PSD module data bus width The PSD module functions as an 8-bit device to the MCU module except when the PFQ is fetching instructions from the Flash memory. When PSEN is active, the PSD module always drives 16-bit data out onto the bus. DPLD Main Flash memory Secondary Flash memory CS CS FS0 - FS7 CSBOOT0 - CSBOOT3 WR VM register bit 4 VM register bit 3 VM register bit 1 VM register bit 2 RD WR OE WR OE 8032 Address 53 other PLD inputs PSEN AI10455 DPLD Main Flash memory Secondary Flash memory CS CS FS0 - FS7 CSBOOT0 - CSBOOT3 WR OE WR OE 8032 Address 53 other PLD inputs WR PSEN RD VM Register = 0Ch AI10456 Obsolete Product(s) - Obsolete Product(s) |
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