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STM32U5A5QJ Datasheet(PDF) 45 Page - STMicroelectronics |
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STM32U5A5QJ Datasheet(HTML) 45 Page - STMicroelectronics |
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45 / 382 page ![]() DS13543 Rev 1 45/382 STM32U5Axxx Functional overview 99 Table 10. Functionalities depending on the working mode(1) Peripheral Run Sleep Stop 0/1 Stop 2 Stop 3 Standby Shutdown VBAT - - - - - CPU Y - - -- -- -- -- -- Flash memory O(2) O(2) - -- -- -- -- -- SRAM1 Y(3)(4) Y(3)(4) O(7) -O(7) -O(7) -- -- -- SRAM2 Y(3)(4) Y(3)(4) O(7) O(5) O(7) -O(7) - O (6) -- -- SRAM3 Y(3)(4) Y(3)(4) O(7) O(5) O(7) -O(7) -- -- -- SRAM4 Y(3)(4) Y(3)(4) O(7) -O(7) -O(7) -- -- -- SRAM5 Y(3)(4) Y(3)(4) O(7) -O(7) -O(7) -- -- -- BKPSRAM O(4) O(4) O O(5) O O O O FSMC O O - -- -- -- -- -- OCTOSPIx (x =1,2) O O - -- -- -- -- -- HSPI1 O O - -- -- -- -- -- Backup registers Y Y Y -Y -Y -Y -Y -Y BOR (Brownout reset) YY Y YY YY YY Y- -- PVD (programmable voltage detector) OO O OO O- -- -- -- Peripheral voltage monitor OO O OO O- -- -- -- GPDMA1 O O O O(8) - -- -- -- -- LPDMA1 O O O O(9) O O(9) - -- -- -- DMA2D O O HSI16 (high-speed internal) OO (10) - (10) -- -- -- -- HSI48 oscillator O O - - - - - -- -- -- HSE (high-speed external) OO - -- -- -- -- -- LSI (low-speed internal) OO O -O -O -O -- -O LSE (low-speed external) OO O -O -O -O -O -O MSIS and MSIK (multi-speed internal) OO (10) - (10) -- -- -- -- CSS (clock security system) OO - -- -- -- -- -- |
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