STM32U5A5QJ datasheet(189/382 Pages) STMICROELECTRONICS

189 / 382 page

DS13543 Rev 1

189/382

STM32U5Axxx

Electrical characteristics

348

5.3.2

Operating conditions at power-up/power-down

The parameters given in the table below are derived from tests performed under the

ambient temperature condition summarized in Table 33.

Ambient

temperature

for suffix 6

Maximum power

dissipation

–40

°C

Low-power dissipation(8)

–40

105

Ambient

temperature

for suffix 3

Maximum power

dissipation

–40

125

Low-power dissipation(8)

–40

130

Junction

temperature range

Suffix 6 version

–40

105

Suffix 3 version

–40

130

1. HSLV means high-speed low-voltage mode (refer to the product reference manual).

2. When RESET is released, the functionality is guaranteed down to VBORx min.

3. In VBAT mode, the functionality is guaranteed down to VBOR_VBAT min.

4. This formula has to be applied only on the power supplies related to the I/O structure described by the pin definition table.

The maximum I/O input voltage is the smallest value between Min (VDD, VDDA, VDDUSB, VDDIO2)+3.6 V, and 5.5V.

5. For operation with voltage higher than Min (VDD, VDDA, VDDUSB, VDDIO2) +0.3 V, the internal pull-up and pull-down resistors

must be disabled.

6. The I/Os powered by VSW are:

- PC13, PC14, PC15 when VDD is present,

- PC13, PC14, PC15, and all FT_t I/Os in VBAT mode.

7. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJ max (see Section 6.9: Package thermal

characteristics).

8. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJ max (see Section 6.9:

Package thermal characteristics).

Table 33. General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 34. Operating conditions at power-up/power-down

Symbol

Parameter

Conditions

Min

Max

Unit

tVDD

VDD rise-time rate

∞

µs/V

VDD fall-time rate

ULPMEN = 0 (default value)

∞

Standby mode, BOR level 0 selected

with ULPMEN = 1

250

∞

ms/V

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