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STM32U5A5QJ Datasheet(PDF) 263 Page - STMicroelectronics

Part # STM32U5A5QJ
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI, crypto
PDF  382 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U5A5QJ Datasheet(HTML) 263 Page - STMicroelectronics

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STM32U5Axxx
Electrical characteristics
348
The characterization results are given in the table below. The negative induced leakage
current is caused by the negative injection.The positive induced leakage current is caused
by the positive injection.
5.3.14
I/O port characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the conditions summarized in Table 33. All I/Os are designed as
CMOS -and TTL-compliant.
Note:
For information on GPIO configuration, refer to the application note ‘STM32 GPIO
configuration for hardware settings and low-power consumption’ (AN4899).
Table 85. I/O current injection susceptibility(1)(2)
Symbol
Description
Functional
susceptibility
Unit
Negative
injection
Positive
injection
IINJ
Injected current on all pins except TT_a, PA4, PA5, DSI_DN_DL1,
DSI_DP_DL1, DSI_DN_CL1, DSI_DP_CL1, DSI_DN_DL2, DSI_DP_DL2,
OPAMP1_VINM, OPAMP2_VINM, PA11, PA12, PE11, PE12, PE7,PB14,
PB5, PA1
5NA
mA
Injected current on TT_a, PA4, PA5, DSI_DN_DL1, DSI_DP_DL1,
DSI_DN_CL1, DSI_DP_CL1, DSI_DN_DL2, DSI_DP_DL2,
OPAMP1_VINM, OPAMP2_VINM, PA11, PA12 pins
00
Injected current on PE11, PE12, PE7 pins
0
NA
Injected current on PB14, PB5, PA1 pins
5
0
1. Evaluated by characterization. Not tested in production.
2. The I/O structure options listed in this table can be a concatenation of options including the option explicitly listed. For
instance TT_a refers to any TT I/O with _a option. TT_xx refers to any TT I/O and FT_xx refers to any FT I/O.
Table 86. I/O static characteristics(1)
Parameter
Conditions
Min
Typ
Max
VIL(2)
I/O input
low-level
voltage
1.08 V ≤ VDDIOx ≤ 3.6 V
-
-
0.3 VDDIOx
V
All I/Os except FT_c
-
-
0.38 VDDIOx(3)
FT_c I/Os
-
-
0.3 VDDIOx
VIH
(2)
I/O input
high-level
voltage
1.08 V ≤ VDDIOx ≤ 3.6 V
0.7 VDDIOx
--
All I/Os except FT_c
0.5 VDDIOx
+ 0.2(3)
--
FT_c I/Os
0.7 VDDIOx
--
Vhys
(3)
Input
hysteresis
TT_xx, FT_xx I/Os
-
250
-
mV



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