HC705C9AGRSSLASHD datasheet(91/157 Pages) NXP

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General Release Specification

SCI I/O Registers

MC68HC705C9A — Rev. 2.0

Serial Communications Interface (SCI)

R8 — Bit 8 (Received)

When the SCI is receiving 9-bit characters, R8 is the ninth bit of the

received character. R8 receives the ninth bit at the same time that the

SCDR receives the other eight bits. Resets have no effect on the R8

bit.

T8 — Bit 8 (Transmitted)

When the SCI is transmitting 9-bit characters, T8 is the ninth bit of the

transmitted character. T8 is loaded into the transmit shift register at

the same time that the SCDR is loaded into the transmit register.

Resets have no effect on the T8 bit.

M — Character Length

This read/write bit determines whether SCI characters are 8 bits long

or 9 bits long. The ninth bit can be used as an extra stop bit, as a

receiver wakeup signal, or as a mark or space parity bit. Resets have

no effect on the M bit.

1 = 9-bit SCI characters

0 = 8-bit SCI characters

WAKE — Wakeup Method

This read/write bit determines which condition wakes up the SCI: a

logic one (address mark) in the most significant bit (MSB) position of

a received character or an idle condition on the PD0/RDI pin. Resets

have no effect on the WAKE bit.

1 = Address mark wakeup

0 = Idle line wakeup

$000E

Bit 7

6543

Bit 0

Read:

WAKE

Write:

Reset:

= Unimplemented

U = Undetermined

Figure 9-9. SCI Control Register 1 (SCCR1)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705C9AGRS/D Datasheet(PDF) 91 Page - NXP Semiconductors

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