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PIC18F6410E/PTSQTP Datasheet(PDF) 128 Page - Microchip Technology

Part # PIC18F6410E/PTSQTP
Description  64/80-Pin Flash Microcontrollers with nanoWatt Technology
PDF  404 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F6410E/PTSQTP Datasheet(HTML) 128 Page - Microchip Technology

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PIC18F6310/6410/8310/8410
DS39635A-page 126
Preliminary
 2004 Microchip Technology Inc.
10.4
PORTD, TRISD and
LATD Registers
PORTD is an 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISD. Setting a
TRISD bit (= 1) will make the corresponding PORTD
pin an input (i.e., put the corresponding output driver in
a high-impedance mode). Clearing a TRISD bit (= 0)
will make the corresponding PORTD pin an output (i.e.,
put the contents of the output latch on the selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger
input
buffers.
Each
pin
is
individually
configurable as an input or output.
In 80-pin devices, PORTD is multiplexed with the
system bus as part of the external memory interface.
I/O port and other functions are only available when the
interface is disabled by setting the EBDIS bit
(MEMCON<7>). When the interface is enabled,
PORTD is the low-order byte of the multiplexed
address/data bus (AD7:AD0). The TRISD bits are also
overridden.
PORTD can also be configured to function as an 8-bit
wide parallel microprocessor port by setting the
PSPMODE control bit (PSPCON<4>). In this mode,
parallel port data takes priority over other digital I/O (but
not the external memory interface). When the parallel
port is active, the input buffers are TTL. For more
information, refer to Section 10.10 “Parallel Slave
Port”.
EXAMPLE 10-4:
INITIALIZING PORTD
Note:
On a Power-on Reset, these pins are
configured as digital inputs.
CLRF
PORTD
; Initialize PORTD by
; clearing output
; data latches
CLRF
LATD
; Alternate method
; to clear output
; data latches
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISD
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs



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