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PIC18F6410E/PTSQTP Datasheet(PDF) 129 Page - Microchip Technology

Part # PIC18F6410E/PTSQTP
Description  64/80-Pin Flash Microcontrollers with nanoWatt Technology
PDF  404 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F6410E/PTSQTP Datasheet(HTML) 129 Page - Microchip Technology

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 2004 Microchip Technology Inc.
Preliminary
DS39635A-page 127
PIC18F6310/6410/8310/8410
TABLE 10-7:
PORTD FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O
Type
Description
RD0/AD0/PSP0
RD0
0
O
DIG
LATD<0> data output.
1
I
ST
PORTD<0> data input.
AD0(2)
x
O
DIG
External memory interface, address/data bit 0 output(1).
x
I
TTL
External memory interface, data bit 0 input(1).
PSP0
x
O
DIG
PSP read data output (LATD<0>); takes priority over port data.
x
I
TTL
PSP write data input.
RD1/AD1/PSP1
RD1
0
O
DIG
LATD<1> data output.
1
I
ST
PORTD<1> data input.
AD1(2)
x
O
DIG
External memory interface, address/data bit 1 output(1).
x
I
TTL
External memory interface, data bit 1 input(1).
PSP1
x
O
DIG
PSP read data output (LATD<1>); takes priority over port data.
x
I
TTL
PSP write data input.
RD2/AD2/PSP2
RD2
0
O
DIG
LATD<2> data output.
1
I
ST
PORTD<2> data input.
AD2(2)
x
O
DIG
External memory interface, address/data bit 2 output(1).
x
I
TTL
External memory interface, data bit 2 input(1).
PSP2
x
O
DIG
PSP read data output (LATD<2>); takes priority over port data.
x
I
TTL
PSP write data input.
RD3/AD3/PSP3
RD3
0
O
DIG
LATD<3> data output.
1
I
ST
PORTD<3> data input.
AD3(2)
x
O
DIG
External memory interface, address/data bit 3 output(1).
x
I
TTL
External memory interface, data bit 3 input(1).
PSP3
x
O
DIG
PSP read data output (LATD<3>); takes priority over port data.
x
I
TTL
PSP write data input.
RD4/AD4/PSP4
RD4
0
O
DIG
LATD<4> data output.
1
I
ST
PORTD<4> data input.
AD4(2)
x
O
DIG
External memory interface, address/data bit 4 output(1).
x
I
TTL
External memory interface, data bit 4 input(1).
PSP4
x
O
DIG
PSP read data output (LATD<4>); takes priority over port data.
x
I
TTL
PSP write data input.
RD5/AD5/PSP5
RD5
0
O
DIG
LATD<5> data output.
1
I
ST
PORTD<5> data input.
AD5(2)
x
O
DIG
External memory interface, address/data bit 5 output(1).
x
I
TTL
External memory interface, data bit 5 input(1).
PSP5
x
O
DIG
PSP read data output (LATD<5>); takes priority over port data.
x
I
TTL
PSP write data input.
RD6/AD6/PSP6
RD6
0
O
DIG
LATD<6> data output.
1
I
ST
PORTD<6> data input.
AD6(2)
x
O
DIG-3
External memory interface, address/data bit 6 output(1).
x
I
TTL
External memory interface, data bit 6 input(1).
PSP6
x
O
DIG
PSP read data output (LATD<6>); takes priority over port data.
x
I
TTL
PSP write data input.
Legend:
PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Note
1:
External memory interface I/O takes priority over all other digital and PSP I/O.
2:
Implemented on 80-pin devices only.



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